Method and device for frequency division and demultiplexing

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Frequency or repetition rate conversion or control

Reexamination Certificate

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C327S117000, C327S047000

Reexamination Certificate

active

10953241

ABSTRACT:
A device and method is described for the frequency division of an input clock signal, in which from the input clock signal at least two output clock signals are generated, with an output pulse frequency equal to an input pulse frequency divided by a given factor, whereby with a phase detector a phase difference is measured between the at least two output signals and each of the at least two output clock signals is either inverted or not inverted, as a function of the phase difference determined. A method of this type is particularly suitable for the demultiplexing of an input data signal, and can also be designed to be multi-step.

REFERENCES:
patent: 4443887 (1984-04-01), Shiramizu
patent: 5128940 (1992-07-01), Wakimoto
patent: 2003/0174798 (2003-09-01), Pickering et al.
patent: 0 226 754 (1986-10-01), None
patent: 03172034 (1991-07-01), None
patent: 09284246 (1997-10-01), None
Andreas Thiede et al., “Mixed Signal Integrated Circuits Based on GaAs HEMT's”, IEEE Transactions of Very Large Scale Integration (VLSI) Systems, vol. 6, No. 1, Mar. 1998, pp. 6-17.
Manfred Lang et al., “20-40 Gb/s 0.2-μm GaAs HEMT Chip Set for Optical Data Receiver”, IEEE Journal of Solid-State Circuits, vol. 32, No. 9, Sep. 1997, pp. 1384-1393.

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