Method and device for fine synchronization of a digital...

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C375S136000, C375S137000, C375S145000, C375S147000, C375S149000, C375S364000

Reexamination Certificate

active

07471754

ABSTRACT:
A method for the synchronization of a digital telecommunication receiver comprises the steps of:—storing a plurality of consecutive samples E−1, E, M, L, L+1 of an incoming spread spectrum signal in a delay line 56;—determining by interpolation between consecutive samples of the incoming spread spectrum signal, by means of a first digitally controlled interpolator26, an interpolated early sample (e) anticipating an optimal sampling time instant;—determining by interpolation between consecutive samples of the incoming spread spectrum signal, by means of a second digitally controlled interpolator24, an interpolated middle sample (m) corresponding to the optimal sampling time instant;—determining by interpolation between consecutive samples of the incoming spread spectrum signal, by means of a third digitally controlled interpolator28, an interpolated late sample (l) delayed with respect to the optimal sampling time instant;—calculating an error signal ξ as the difference between the energy of the symbols computed from the interpolated early sample (e) and the interpolated late (l) sample;—extracting the sign of the error signal ξ—accumulating the sign of the error signal ξ for the generation of control signals SE, SM, SLfor controlling the interpolation phases of the digitally controlled interpolators used for determining the interpolated early (e), middle (m) and late (l) samples. The accumulated value has a positive saturation value of +4 and a negative saturation value of 4.

REFERENCES:
patent: 5493588 (1996-02-01), Lennen
patent: 5781152 (1998-07-01), Renard et al.
patent: 6201828 (2001-03-01), El-Tarhuni et al.
patent: 7206335 (2007-04-01), Bultan et al.
patent: 2004/0029609 (2004-02-01), Li
patent: 0 880 238 (1996-11-01), None
patent: 0 932 263 (1999-07-01), None
“Interpolation in Digital Modems—Part I” (IEEE Trans Comm. Mar. 1993).
“Interpolation in Digital Modems—Part II” by Erup et al. (same date).
“A Digital Chip Timing Recovery Loop . . . ”by De Gausenzi et al. (IEEE Trans. Nov. 1993.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and device for fine synchronization of a digital... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and device for fine synchronization of a digital..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and device for fine synchronization of a digital... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4025867

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.