Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2011-05-24
2011-05-24
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S106000, C716S109000, C716S110000, C716S111000, C716S119000
Reexamination Certificate
active
07949977
ABSTRACT:
The method comprises a number of simultaneously switching signals calculation step in which the number of simultaneously switching signals is calculated for each set of user setting information for the input and output signal on the basis of pin arrangement information and the user setting information of the pins in a neighboring area of a pin to be executed in the estimation process; and a simultaneous switching noise calculation step in which a difference is calculated between noise corresponding to an initial point and that to a terminal point in a range of the number of simultaneously switching signals calculated for each set of user setting information on the basis of a relationship between the number of simultaneously switching signals and the noise caused by the number of simultaneously switching signals for each set of user setting information.
REFERENCES:
patent: 5477460 (1995-12-01), Vakirtzis et al.
patent: 6564355 (2003-05-01), Smith et al.
patent: 7139691 (2006-11-01), Duong
patent: 7412673 (2008-08-01), Duong
patent: 7523430 (2009-04-01), Patel
patent: 2000-285146 (2000-10-01), None
Kouzaki Yasuo
Uekusa Shinichiro
Dinh Paul
Fujitsu Limited
Kratz Quintos & Hanson, LLP
Nguyen Nha T
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