Data processing: structural design – modeling – simulation – and em – Emulation – Of peripheral device
Reexamination Certificate
1999-05-11
2002-04-02
Frejd, Russell W. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Emulation
Of peripheral device
C703S026000
Reexamination Certificate
active
06366877
ABSTRACT:
TECHNICAL FIELD
The present invention relates to an emulation system and an information processing device.
BACKGROUND ART
An interface between CPU
900
and input devices including keyboard
950
and mouse
960
in a conventional personal computer (PC) which is an information processing device is shown in FIG.
1
. Between the CPU
900
and the keyboard and mouse (
950
,
960
), there exists an input/output controller which comprises a chip (e.g., the Intel 8042) or compatible chip of 8042 and its peripheral circuits. In such PC, data will not be transmitted directly between the CPU
900
and the keyboard and mouse (
950
,
960
). Instead, the 8042 (or firmware operating on the 8042) performs the control of the keyboard and mouse (
950
,
960
) and the reception/transmission of data. The firmware has been stored in ROM within the 8042. In
FIG. 1
, other reference numerals
910
,
912
and
914
denote an address decoder, interrupt controller and reset circuit, respectively.
FIG. 2
is an internal block diagram showing the details of the input/output controller. The 8042 comprises a processor
920
, an output buffer
922
, an input buffer
924
, a status register
926
, port registers (I/O ports)
928
,
930
and others.
The reception/transmission of data in this arrangement of the prior art will now be described in brief.
1. When data is transmitted from BIOS (which is an input/output handler) to the 8042:
(1) BIOS waits until “Input Buffer Full”, that is a flag held by the status register
926
, becomes 0; and
(2) BIOS writes data on the input buffer (port
60
h
or
64
h
) if “Input Buffer Full” becomes 0.
2. When BIOS receives data from the 8042 without interrupt:
(1) BIOS waits until a flag “Output Buffer Full” of the status register
926
becomes 1; and
(2) BIOS reads data from the output buffer
922
(port
60
h
) if “Output Buffer Full” becomes 1.
3. When BIOS receives data from the 8042 with interrupt:
(1) If IRQ
1
or IRQ
12
occurs, the control is shifted to its interrupt handler (which is one of input/output handlers);
(2) The interrupt handler reads data from the output buffer
922
(port
60
h
);
(3) The interrupt handler executes a predetermined process such as storing the read data in a given memory area; and
(4) The control is returned from the interrupt handler.
However, the prior art raised problems as follows.
(A) The necessity of the 8042 leads to an increased cost.
(B) The 8042 requires an additional area on which it is to be mounted.
(C) The 8042 requires an executable firmware. In other words, the system requires two types of programming languages for both CPU and the 8042.
(D) Since a firmware is normally stored in the mask ROM within the 8042, time and cost are required to change the firmware for correcting any trouble or for adding any additional function.
One emulation technique relating to an input/output controller such as the 8042 is known, for example, from Japanese Patent Application Laid-Open No. 7-334373. PC9821 produced by NEC (which uses a second architecture) or PC 486 produced by Seiko Epson Co. uses the Intel 8251A as an input-output controller for keyboard or others. An object of this prior art is to use the 8042 used in PC/AT computer (which uses a first architecture) produced by IBM as an input-output controller for PC9821 or the like, instead of the 8251A.
The 8042 suiting to the PC/AT machines of the first architecture that dominates large shares of the hardware and software markets can relatively early be developed for advanced machines and more easily be available, than the 8251A suiting to the PC9821 machines of the second architecture. If the 8042 is used in the PC9821 machines, therefore, the developing and manufacturing costs thereof can be reduced. Thus, the aforementioned prior art realized various emulation techniques for properly actuating the 8042 in the PC9821 machines in which the software for the 8251A operates.
However, this prior art cannot still overcome the above problems (A)-(D). More particularly, this prior art utilizes the hardware resource of the 8042 to perform an emulation. Thus, it still requires the 8042, resulting in increase of the manufacturing cost. Furthermore, the prior art also requires an additional area on which the 8042 is to be mounted and two types of programming languages for CPU and the 8042. In addition, time and cost are required to modify the firmware.
In view of the above problems of the prior art, an object of the present invention is to provide an emulation system and information processing device which can realize an emulation for the input/output controller without utilization of the hardware resource of the input/output controller
DISCLOSURE OF THE INVENTION
To this end, the present invention provides an emulation system for emulating an input/output controller which controls an input/output device without the hardware resource of the input/output controller. This emulation system comprises: a reception/transmission circuit for receiving data from and transmitting data to the input/output device; at least one of an output buffer for temporarily storing data from the input/output device, an input buffer for temporarily storing data from a given input/output handler, a status register for storing given status data, and a port register for transmitting given data to an external means; an interrupt generating circuit for generating a first interrupt for a central control means; and an emulation handler which is activated by the first interrupt for executing a given emulation.
By providing the reception/transmission circuit, the reception/transmission of data from and to the input/output devices such as mouse, keyboard and the like can be performed. The output buffer can temporarily store the data from the input/output devices while the input buffer can temporarily store the data from the input/output handler such as BIOS or interrupt handler. The status register can transmit the given status data to the input/output handler and the port register can transmit various data to the external. When the emulation handler is activated by the first interrupt from the interrupt generating circuit, the emulation handler can execute various processes such as the mutual delivery of data between the reception/transmission circuit and the output buffer or between the input/output handler and the input buffer, the control of the reception/transmission circuit, the writing of data into the status register or port register and so on. Therefore, the input/output controller can be emulated without utilization of the hardware resource thereof. AS a result, the cost of manufacturing the information processing device can be reduced, and firmware languages required to operate the information processing device can be unified. In addition this information processing device can easily accommodate a new input/output device.
The interrupt generating circuit may generate the first interrupt when reception of data from the input/output device is completed by the reception/transmission circuit, and the emulation handler activated by this first interrupt may read data from the reception/transmission circuit and write the data or converted data into the output buffer. In this way, the emulation of data transfer from the input/output device to the output buffer can be accomplished while maintaining the compatibility with the case wherein the input/output controller is used.
The reception/transmission circuit may include a circuit for converting serial data send by the input/output device into parallel data, and the interrupt generating circuit may generate the first interrupt when conversion of serial data into parallel data is completed by the reception/transmission circuit. The reception of data from the input/output device is thus possible without monitoring transfer clocks which are used in the reception of data from the input/output device. This reduces a burden in processing.
The emulation handler may terminate emulation without writing data into the output buffer when the input/output handler has not read data in
Kamihata Tomio
Nishino Minoru
Frejd Russell W.
Seiko Epson Corporation
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