Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device
Reexamination Certificate
2001-12-19
2003-02-25
Wong, Don (Department: 2821)
Electric lamp and discharge devices: systems
Plural power supplies
Plural cathode and/or anode load device
C345S060000
Reexamination Certificate
active
06525486
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method and a device for driving an AC type plasma display panel.
A plasma display panel (a PDP) unites high speed and high resolution suitable for a television set as well as a computer monitor and is used as a large screen display device. As it comes into wide use, its using environment becomes diversified. Therefore, a driving method is desired that realizes a stable display insusceptible of temperature variation or voltage regulation of a power source. It is also an important subject to reduce power consumption.
2. Description of the Prior Art
As a color display device, a surface discharge format AC type PDP is commercialized. The surface discharge format means a structure in which display electrodes (first electrodes and second electrodes) that are anode and cathode in display discharge for securing luminance are arranged on a front or a back substrate in parallel, and address electrodes (third electrodes) are arranged so as to cross the display electrode pairs. There are two forms of display electrode arrangement. In the first form, a pair of display electrodes is arranged for one row of a matrix display. In the second form, the first display electrode and the second display electrode are arranged alternately at a constant pitch, so that each display electrode except both ends of the arrangement works for two rows (lines) of a display. Regardless of the arrangement form, the display electrode pairs are covered with a dielectric layer.
In a display using a surface discharge format PDP, one of the two display electrodes corresponding to a row (the second electrode) is used as a scan electrode for selecting a row, so as to generate address discharge between the scan electrode and the address electrode, which causes address discharge between the display electrodes. Thus, electrostatic charge quantity in the dielectric layer (wall charge quantity) is controlled in accordance with contents of a display in addressing. After the addressing, a sustaining voltage Vs having alternating polarities is applied to the display electrode pair. The sustaining voltage Vs satisfies the following inequality (1).
Vf
XY
−Vw
XY
<Vs<Vf
XY
(1)
Here, Vf
XY
denotes a discharge start voltage between the display electrodes, and Vw
XY
denotes the wall voltage between the display electrodes.
When the sustaining voltage Vs is applied, a cell voltage (the sum of a driving voltage that is applied to the electrode and the wall voltage) exceeds the discharge start voltage Vf
XY
and surface discharge is generated on the surface of the substrate only in cells having a predetermined quantity of wall charge. As the application period is shortened, light emission looks as if it is continuous.
A discharge cell of a PDP is basically a binary light emission element. Therefore, a half tone is reproduced by setting integral light emission quantity of each discharge cell in a frame period in accordance with a gradation value of input image data. A color display is one type of a gradation display, and a display color is determined by combining luminance values of three primary colors. The gradation display is realized by making one frame of plural subframes (or subfields in an interlace display) having luminance weights and by setting the integral light emission quantity combining on and off of the light emission for each subframe.
FIG. 9
is a diagram of voltage waveforms showing a general driving sequence. In
FIG. 9
, reference letters X, Y and A denote the first display electrode, the second display electrode and the address electrode, respectively. Suffixes
1
−n of X and Y denote arrangement orders of rows corresponding to display electrodes X and Y. Suffixes
1
−m of A denote arrangement orders of columns corresponding to address electrodes A.
A subframe period Tsf assigned to each subframe is divided into a reset period TR for equalizing charge distribution in a screen, an address period TA for forming the charge distribution corresponding to contents of a display by applying a scan pulse Py and an address pulse Pa and a sustain period (or a display period) TS for securing a luminance value corresponding to a gradation value by applying a display pulse Ps. The lengths of the reset period TR and the address period TA do not change regardless of the luminance weight, while the length of the sustain period TS is longer as the luminance weight is larger. The driving sequence is repeated for each subframe in the order of the reset period TR, the address period TA and the display period TS.
When the sustain period of each subframe finishes, there are discharge cells having relatively much wall charge and discharge cells having little wall charge. In order to increase reliability of the addressing of the next subframe, a reset process for charge equalization is performed in the reset period TR.
U.S. Pat. No. 5,745,086 discloses a reset process in which a first ramp voltage and a second ramp voltage are applied to a discharge cell sequentially. When a ramp voltage having a mild gradient (an increasing waveform voltage) is applied, light emission in the reset process is made minute so as to prevent a contrast from dropping because of the characteristics of microdischarge as explained below. In addition, the wall voltage can be set to any target value regardless of variation of a cell structure.
If the gradient of the ramp voltage is mild, minute charge adjustment discharges are generated plural times in the rising process of the applied voltage. When the gradient is made milder, discharge intensity is reduced and a discharge period is shortened so that the discharge transfers to a continuous discharge form. In the following explanation, periodical charge adjustment discharge and continuous charge adjustment discharge are collectively called “microdischarge”.
In the microdischarge, the wall voltage can be controlled by setting the maximum final voltage of the ramp waveform. During the microdischarge, even if the cell voltage Vc (i.e., the wall voltage Vw plus an applied voltage Vi) that is applied to a discharge space exceeds discharge start threshold level (hereinafter, denoted by Vt) because of increase of the ramp voltage, the cell voltage is always maintained in the vicinity of the voltage Vt thanks to the generation of microdischarge. The microdischarge reduces the wall voltage by the same amount as the increase of the ramp voltage. Supposing the final value of the ramp voltage is Vr, and the wall voltage is Vw when the ramp voltage reaches the final value Vr, the following equation is satisfied since the cell voltage Vc is kept at Vt.
Vc=Vr+Vw=Vt
, therefore
Vw
=−(
Vr−Vt
)
Since the voltage Vt has a constant value determined by electric characteristics of the discharge cell, the wall voltage can be set to any desired value by setting the final value Vr of the ramp voltage. More specifically, even if there is a minute difference in the voltage Vt between the discharge cells, the difference between the voltages Vt and Vw of each of all discharge cells can be equalized.
In the example shown in
FIG. 9
, the first ramp voltage ascending to a voltage Vyr
1
is applied to the display electrode Y, so that wall charge is formed between the display electrode X and the display electrode Y (referred to as interelectrode XY) as well as between the display electrode Y and the address electrode A (referred to as interelectrode AY). After that, the second ramp voltage descending to a voltage Vyr
2
is applied to the display electrode Y, so that the wall voltage at the interelectrode XY and the wall voltage at the interelectrode AY get close to a target value. In synchronization with the application of the ramp voltage, potentials Vxr
1
and Vxr
2
are applied to the display electrode X. The application of a voltage means to bias an electrode so as to generate a predetermined voltage between the electrode and a reference potential. The voltage values Vxr
1
and Vyr
1
Awamoto Kenji
Hashimoto Yasunobu
Sakita Koichi
Takayama Kunio
Trand Chuc
Wong Don
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