Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device
Reexamination Certificate
2000-12-05
2002-04-09
Wong, Don (Department: 2821)
Electric lamp and discharge devices: systems
Plural power supplies
Plural cathode and/or anode load device
C345S067000, C345S068000
Reexamination Certificate
active
06369514
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method and a device for driving an AC type PDP.
A PDP (plasma display panel) is used widely for a television set or a monitor display of a computer, taking the occasion of a practical use of a color screen. Along with the widespread use, the use environment has become diversified, so a driving method for a stable display is required that is not affected by variations of the temperature and the power source voltage.
2. Description of the Prior Art
As a color display device, a surface discharge AC type PDP is commercialized. The surface discharge is a format in which display electrodes (first electrodes and second electrodes) that become anodes and cathodes in the display discharge for securing a luminance are arranged in parallel on the front or the rear substrate, and third electrodes (address electrodes) are arranged to cross the display electrode pair. There are two forms of the display electrode arrangement. In one form, a pair of display electrodes is arranged for each row of the matrix display. In the other form, the first and the second display electrodes are arranged alternately at a constant distance. In the latter case, the display electrodes except the both ends of the arrangement are related to the two neighboring row display. Regardless of the arrangement, the display electrode pair is covered with a dielectric.
In the surface discharge format PDP, an addressing is performed in which one (the second electrode) of the display electrode pair corresponding to each row is used as a scan electrode for row selection, and an address discharge is generated between the scan electrode and the address electrode. The address discharge triggers another address discharge between the display electrodes, so that a charge quantity (a wall charge quantity) in the dielectric is controlled in accordance with contents of the display. After the addressing, a sustaining voltage Vs having an alternating polarity is applied between the display electrodes. The sustaining voltage Vs satisfies the following inequality.
Vf
XY
−Vw
XY
<Vs<Vf
XY
(1)
Vf
XY
is the discharge start voltage between the display electrodes.
Vw
XY
is the wall voltage between the display electrodes.
When increasing the sustaining voltage Vs, the cell voltage (the sum of the driving voltage applied to the electrode and the wall voltage) exceeds the discharge start voltage Vf
XY
only in cells having a predetermined wall charge, so that the surface discharge occurs along the substrate surface. If the application period is shortened, the light emission becomes continuous visually.
A discharge cell of a PDP is a binary light emission element. Therefore, a half tone is reproduced by setting an integral light emission quantity of each discharge cell in the frame period in accordance with a gradation value of the input image data. The color display is a type of a gradation display, and the display color is determined by a combination of luminance values of three primary colors. The gradation display utilizes a method of constituting one frame with plural subframes (subfields in an interlace display) having a weight of luminance, and of setting an integral light emission quantity by a combination of on and off of the light emission of each subframe. For example, one frame is divided into eight subframes having the luminance weights of 1, 2, 4, 8, 16, 32, 64 and 128, respectively so as to perform the 256-step gradation display. In general, weight of the luminance is set by the number of light emissions.
FIG. 11
is a diagram showing voltage waveforms of a general driving sequence. The reference characters X, Y and A denote the first electrode, the second electrode and the third electrode, respectively. The suffixes 1−n of the reference characters X and Y indicate the arrangement order of the rows corresponding to the electrodes X, Y. The suffixes 1−m of the reference character A indicate the arrangement order of the column corresponding to the electrode A.
The subframe period Tsf that is assigned to each subframe includes a preparation period TR for equalizing a charge distribution of the screen, an address period TA for forming the charge distribution corresponding to the display contents by applying a scanning pulse Py and an address pulse Pa, and a sustaining period TS for securing the luminance corresponding to the gradation value by applying a sustaining pulse Ps. Though the length of the preparation period TR and the address period TA is constant regardless of the luminance weight, the length of the sustaining period TS is longer for a larger luminance weight. The illustrated waveform is an example, and the amplitude, the polarity and the timing can be changed variously. A method of controlling the charge quantity by applying a ramp waveform pulse is preferable for equalizing the charge distribution.
FIG. 12
is a diagram showing driving voltage waveforms in the conventional address period.
In the address period TA, concerning the second electrode Y that is used as a scan electrode for row selection of the screen having n rows and m columns, an individual potential control is performed. After biasing all second electrodes Y to the non-selection potential Vya
2
at the start point of the address period TA, the second electrode Y corresponding to the selected row i (1≦i≦n) is biased to the selected potential Vya
1
temporarily (application of the scanning pulse). The illustrated row selection order is the same as the arrangement order of the row. In synchronization with the row selection, the third electrode A of the column including the selected cell that generates the address discharge among the selected row is biased to the selection potential Vaa (application of the address pulse). The third electrode A of the column including the non-selected cell is biased to the ground potential (normally, 0 volt). The first electrode X is biased to a constant potential Vxa from the start to the end of the addressing regardless of whether the row is the selected row or the non-selected row. The potential Vxa is set so that the cell voltage between the electrodes X and Y when the scanning pulse is applied to the second electrode Y is a little lower than the discharge start voltage Vf
XY
. Thus, when an address discharge occurs between the third electrode A and the second electrode Y, the address discharge triggers another discharge between the electrodes X and Y (hereinafter, referred to as an address discharge) to occur. The address discharge is not generated between the electrodes X and Y of the non-selected cell having no trigger.
FIG. 13
is a diagram showing the structure of the conventional scanning circuit.
FIG. 14
is a diagram showing a structure of a switch circuit that is called a scanning driver.
The conventional scanning circuit
780
includes plural scanning drivers
781
for binary control of the potential of each of the n second electrodes Y, and two switches (switching devices such as FETs) Q
50
, Q
60
for switching the voltage that is applied to the scanning drivers. Each scanning driver
781
is an integrated circuit device, which is in charge of controlling the j second electrodes Y. In a typical and available scanning driver
781
, j is approximately 60-120. As shown in
FIG. 14
, in each scanning driver
781
, a pair of switches Qa, Qb is arranged for each of the j second electrodes Y. The j switches Qa are connected commonly to the power source terminal SD, and j switches Qb are connected commonly to the power source terminal SU. When the switch Qa turns on, the second electrode Y is biased to the potential of the power source terminal SD at that time. When the switch Qb is turned on, the second electrode Y is biased to the potential of the power source terminal SU at that time. The control signal from the controller is given to the switches Qa, Qb via a shift register, which works for realizing the row selection in a predetermined order. The scanning driver
781
includes diodes
Fujitsu Limited
Lee Wilson
Staas & Halsey , LLP
Wong Don
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