Coded data generation or conversion – Digital code to digital code converters – Data rate conversion
Reexamination Certificate
2003-02-27
2004-10-05
JeanPierre, Peguy (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
Data rate conversion
C341S141000, C341S155000
Reexamination Certificate
active
06801142
ABSTRACT:
BACKGROUND AND SUMMARY OF THE INVENTION
The invention generally relates to processing a read signal as obtained during reading a carrier with information recorded in a digital form, which read signal is representative of the recorded information.
More particularly, the invention relates to a method as described in the introductory part of claim
1
. Such a method is known from U.S. Pat. No. 4,912,729.
The information recorded in a digital form may be intrinsic digital information (data), or digitized analog information such as, for example, audio or video. The information may be recorded by means of an arbitrary technique, for example, magnetic or optical recording, on a record carrier having an arbitrary suitable shape, for example, a tape or a disc, as are known per se, for which reason this will not be further explained. More particularly, the invention relates to reading a CD and hence to EFM, EFMPLUS and related modulation techniques.
As is known, information recorded in a digital form generally has the character of a sequential series of information units which are denoted as “bits” and which, in principle, may assume two logic values denoted as “0” and “1”. In a practical sense, the actual recording of these two values takes place in the form of a physical parameter such as, for example magnetization direction or optical reflection. When the information is read from the record carrier, use is made of a suitable read member such as, for example a magnetic or optical read head, which read member provides an analog electric read signal which is indicative of the read values of this relevant parameter. The read member is usually active continuously, and the read signal provided by the read member usually has a continuous character, considered with respect to time, which read signal can, in principle, assume only two signal levels. Theoretically, the read signal thus has the shape of a square-wave signal with straight edges. In practice, the read signal will have a smoother variation between these two signal levels as extreme values. This read signal will hereinafter be referred to as “analog read signal”.
It is to be noted that the read signal may not be a continuous signal but a time-discrete signal, as will be evident to those skilled in the art.
For the ultimate digital processing in a read apparatus, the analog read signal must be converted into a digital signal. To this end, a signal-processing member of the read apparatus has an input stage with a bit detector which converts the analog read signal into a digital signal which comprises the separate consecutive bits, i.e. a series of zeros and ones. A primary task of the bit detector is to render the value of the read signal discrete, i.e. to provide a signal which can assume two values only, which values are denoted by 0 and 1. This discrete signal, which will hereinafter be referred to as “digital signal”, may be a time-continuous signal, but it may also be a time-discrete signal, i.e. a signal having a valid value only at predetermined, equidistant instants; such a signal is denoted as “bit stream signal”. The principle of operation of a bit detector is based on sampling the analog read signal at predetermined sampling instants; in this respect, a bit detector is comparable with an A/D converter.
A bit detector may be realized with analog components. However, there is a need for digital bit detectors, i.e. bit detectors realized with digital components. An example of a digital bit detector is described in U.S. Pat. No. 4,912,729.
A problem with digital bit detectors is that the sampling frequency and the sampling instants are determined by a system clock signal whose frequency is not coupled to the bit frequency. This means that the actual sampling instants generally do not coincide with the desired, bit-synchronous sampling instants and that, generally, the measured sampling values are not directly usable. More particularly, a new series of bit-frequency arithmetic values must be derived from the series of measured sampling values, which arithmetic values at least approximately correspond to the values which would have been measured if the read signal had actually been sampled at the desired bit-synchronous sampling instants.
For this purpose, a linear interpolation method is described in said publication, in which method the phase of the actual sampling instants relating to the desired sampling instants is determined and in which an arithmetic value associated with a given desired sampling instant is computed by linear interpolation between two sampling values measured on either side of said given desired sampling instant, taking said phase into account.
However, linear interpolation has a limited accuracy.
Moreover, known digital bit detectors have the drawback that the sampling frequency must be larger than the bit frequency. At large bit frequencies, the system clock frequency required for such a known bit detector would have to be proportionally larger. However, sampling of the read signal at such high frequencies, and performing said linear interpolation method at such high frequencies, become more and more difficult and expensive as these frequencies increase. A further drawback of this known method is that the occurring error becomes larger at larger bit frequencies.
It is a general object of the present invention to obviate these drawbacks.
An important object of the present invention is to provide a digital bit detector which can be operated at a system clock frequency which is lower than the bit frequency. Another important object of the present invention is to provide a method and device for deriving, from a series of actual sampling values having a first frequency, a series of arithmetic values having a second frequency, which second frequency is higher than the first frequency.
In accordance with an important aspect of the present invention, an arithmetic value is computed from the measured sampling values by computing the convolution of the measured sampling values with a function which is centered around the desired sampling instant and is the Fourier-transform of a predetermined pulse response of the sampling filter.
These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiments described hereinafter.
REFERENCES:
patent: 3996456 (1976-12-01), Hoover
patent: 4636972 (1987-01-01), Boland
patent: 4912729 (1990-03-01), Van Rens et al.
patent: 5717618 (1998-02-01), Menkhoff et al.
patent: 6084924 (2000-07-01), Melas
patent: 6370502 (2002-04-01), Wu et al.
Belk Michael E.
Jean-Pierre Peguy
Koninklijke Philips Electronics , N.V.
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