Adhesive bonding and miscellaneous chemical manufacture – Differential fluid etching apparatus – With microwave gas energizing means
Reexamination Certificate
1998-10-08
2002-03-26
Bueker, Richard (Department: 1763)
Adhesive bonding and miscellaneous chemical manufacture
Differential fluid etching apparatus
With microwave gas energizing means
C118S7230ER, C118S728000, C118S500000, C204S298030, C204S298080, C204S298320, C204S298340, C361S234000, C323S234000, C323S304000, C323S318000, C324S109000
Reexamination Certificate
active
06361645
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the manufacture of semiconductor devices. More specifically, the present invention relates to improved methods and apparatus for electrostatically clamping a semiconductor wafer on an electrostatic chuck in a processing chamber of a semiconductor wafer processing system.
2. Description of the Related Art
Semiconductor processing systems are generally used to process semiconductor wafers for fabrication of integrated circuits. For example, plasma-enhanced semiconductor processes are commonly used in etching, oxidation, chemical vapor deposition (CVD). The plasma-enhanced semiconductor processes are typically carried out by means of plasma processing systems and generally include a plasma processing chamber to provide a controlled setting.
Conventional plasma processing chambers often include electrostatic chucks to hold a wafer (e.g., silicon wafer or substrate) in place for processing. Electrostatic chucks utilize electrostatic force to clamp the wafer to the chuck. Electrostatic chucks are well known in the art and are amply described, for example, in commonly owned U.S. Pat. No. 5,789,904 by Francois Guyot and entitled “High Power Electrostatic Chuck Contact,” which is incorporated herein by reference.
Electrostatic chucks can be classified into monopolar and bipolar electrostatic chucks. Monopolar electrostatic chucks have a single pole whereas the bipolar electrostatic chucks have two poles.
FIG. 1A
illustrates an exemplary plasma processing system
100
that includes a monopolar electrostatic chuck (ESC)
104
. The plasma processing system
100
includes a plasma processing chamber
102
, a radio frequency (RF) power supply
118
, and an ESC power supply
116
. Disposed within the plasma processing chamber
102
are a shower head
110
, the ESC
104
, and a semiconductor wafer
106
disposed over the ESC
104
. The shower head
110
is typically used to release source gases
112
into a plasma region
120
of plasma processing chamber
102
and may be made of a non-conductive material such as quartz.
When the RF power supply
118
is energized, a plasma is created within plasma region
120
out of the source gases. The wafer
106
is disposed over the electrostatic chuck
104
to be processed by the plasma. The electrostatic chuck
104
includes a dielectric layer
108
disposed over a metal layer
109
. The metal layer
109
serves as an electrostatic pole (i.e., electrode) and is negatively biased in the monopolar ESC configuration of
FIG. 1. A
heat transfer gas (e.g., helium) is provided under pressure via a port
114
between the electrostatic chuck
104
and the wafer
106
. The gas acts as a heat transfer medium between the wafer
106
and electrostatic chuck
104
to facilitate control of the wafer temperature during processing.
To securely clamp the wafer
106
to the electrostatic chuck
104
during processing, the ESC power supply
116
is activated. When the plasma is generated in the plasma region
120
, the plasma essentially functions as a resistor coupled between the wafer
106
and ground. In this configuration, the ESC pole is biased with the negative direct current potential. The direct current potential in the electrostatic pole creates a potential difference between the top surface of the pole and the bottom surface of the wafer, thereby generating an electrostatic force to hold the wafer
106
in place with respect to the electrostatic chuck
104
. Electrostatic chucks are well known in the art and are described in detail in the following references, which are incorporated herein by reference: U.S. patent application Ser. No. 08/624,988 by Jones et al. and entitled “Dynamic Feedback Electrostatic Wafer Chuck,” and U.S. patent application Ser. No. 08/550,510 by Castro et al.
FIG. 1B
illustrates the plasma processing system
100
that includes a bipolar electrostatic chuck
150
instead of the monopolar electrostatic chuck. The bipolar electrostatic chuck
150
has a pair of metal portions
152
and
154
. The metal portion
152
is coupled to a negative terminal of the ESC power supply
116
while the metal portion
154
is coupled to a positive terminal of the ESC power supply
116
. These metal portions
152
and
154
function as a pair of electrodes with a negative pole and a positive pole, respectively. The RF power supply
118
is coupled to the electrostatic chuck
150
to excite the plasma. Disposed on top of the metal portions is a dielectric layer
156
. A feed-tube
158
is formed through the electrostatic chuck
150
to supply a cooling gas (e.g., helium) to the wafer
106
during processing.
When the ESC and RF power supplies are activated along with the shower head
110
to release plasma into the plasma region, a positive potential and a negative potential are induced on the positive and negative poles, respectively, thereby generating an electrostatic forces between the poles and the respective overlaying wafer regions. The electrostatic forces holds the wafer
106
in place with respect to the electrostatic chuck
150
during processing.
Unfortunately, the wafer
106
typically develops a self-bias voltage during the operation of the plasma processing system
100
in both the monopolar and bipolar ESC arrangements. By way of example, if the ESC power supply supplies −200 volt (V) to the electrostatic chuck
104
in the monopolar ESC configuration with the RF power activated, the wafer
106
may develop a self-bias voltage of −100 V. This means that the effective clamping force is only 100 V, thereby leading to inefficient clamping of the wafer
106
.
One of the traditional techniques compensates for the self-bias voltage of the wafers by using silicon carbide resistors connected with the plasma to balance the self-bias voltage of the wafer. Unfortunately, this solution is highly application specific in that it works only in a specified chemistry, process, and/or chamber.
Another conventional technique estimates a bias voltage of a wafer beforehand and compensates for the bias during the plasma process based on the estimated bias voltage. For example, assuming a desired clamping voltage of 500 volts, if a bias voltage of a wafer is estimated to be 300 volts, the setpoint voltage of ESC power supply was set to 800 volts to generate the desired 500 volts. This solution, however, does not provide optimum compensation since bias voltage of a wafer may change from one moment to another due to changes in the process parameters.
Another problem associated with conventional compensation techniques is the potential damage to electrostatic chucks due to typically high setpoint voltages supplied by ESC power supplies. For example, if the RF power supply doesn't activate in time, the high setpoint voltages from the ESC power supplies may seriously damage the electrostatic chucks.
Furthermore, a bias voltage of a wafer is difficult to measure directly during plasma processing in the chamber due to the difficulty of establishing an electrical contact to the wafer via a voltage and/or current probe during the plasma processing. In addition, such an electrical contact may be undesirable because the additional electrical contacts may affect the sensitive plasma process in the chamber.
In view of the foregoing, what is needed are devices and methods for efficiently compensating for the self-bias of wafers during plasma processing without a direct contact to the wafers. What is further needed is apparatus and method that can dynamically compensate for the changes in self-bias of wafers without damaging the electrostatic chucks.
SUMMARY OF THE INVENTION
Broadly speaking, the present invention fills these needs by providing a device, method, and system for compensating a wafer bias voltage in a plasma processing chamber. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device, a method, or a computer readable medium. Several inventive embodiments of the present
Barnes Michael S.
Knop Robert E.
Ngo Tuan M.
Olson Christopher H.
Schoepp Alan M.
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