Method and device for calculating a result of an exponentiation

Details Method and device for calculating a result of an exponentiation Method and device for calculating a result of an exponentiation

2006-03-21

2006-03-21

Malzahn, D. H. (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S491000

Reexamination Certificate

active

07016929

ABSTRACT:
For calculating the result of an exponentiation Bd, B being a base and d being an exponent which can be described by a binary number from a plurality of bits, a first auxiliary quantity X is at first initialized to a value of 1. Then a second auxiliary quantity Y is initialized to the base B. Then, the bits of the exponent are sequentially processed by updating the first auxiliary quantity X by X2or by a value derived from X2and by updating the second auxiliary quantity Y by X*Y or by a value derived from X*Y, if a bit of the exponent equals 0. If a bit of the exponent equals 1, the first auxiliary quantity X is updated by X*Y or by a value derived from X*Y and the second auxiliary quantity Y is updated by Y2or by a value derived from Y2. After sequentially processing all the bits of the exponent, the value of the first auxiliary quantity X is used as the result of the exponentiation. Thus a higher degree of security is obtained by homogenizing the time and current profiles. In addition, an increase in performance is enabled by a possible parallel performance of operations.

REFERENCES:
patent: 4532638 (1985-07-01), Lagger et al.
patent: 6125445 (2000-09-01), Arditti et al.
patent: 6304889 (2001-10-01), Ehrman
patent: 6317769 (2001-11-01), Kobayashi et al.
patent: 6567832 (2003-05-01), Ono et al.
patent: 2001/0010077 (2001-07-01), McGregor et al.
patent: 2002/0010730 (2002-01-01), Blaker
patent: 2003/0037087 (2003-02-01), Rarick
patent: 2003/0093453 (2003-05-01), Ruehle
patent: 693 29 929 (2001-09-01), None
patent: WO-00/25204 (2000-05-01), None
Oswald E et al: “Randomized Addition-Substraction Chains as a Countermeasure against Power Attacks”; Cryptographic Hardware and Embedded Systems, 3rd International Workshop, CHES 2001, Paris, France, May 14-16, 2001 Proceedings, Lecture Notes in Computer Science, Berlin, Springer. DE, vol. 2162, pp. 39-50, ISBN: 3-540-42521-7.
Kocher P: “Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems”; Advances in Cryptology—CRYPTO '96, 16th Annual International Cryptology Conference, Santa Barbara, CA, Aug. 18-22, 1996, Proceedings of the Annual International Cryptology Conference (CRYPTO), Berlin, Springer, DE, Bd. CONF. Aug. 16, 1996, pp. 104-113, ISBN: 3-540-61512-1.

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