Semiconductor device manufacturing: process – Including control responsive to sensed condition
Reexamination Certificate
2002-12-18
2004-10-19
Pert, Evan (Department: 2829)
Semiconductor device manufacturing: process
Including control responsive to sensed condition
C702S167000, C451S005000
Reexamination Certificate
active
06806098
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method and device for inspecting a surface of a semiconductor device, and more particularly to a method which can efficiently inspect a surface uniformity of a semiconductor which is treated by a chemical mechanical polishing method.
2. Description of the Related Art
As a process for leveling or flattening a semiconductor device, a chemical mechanical polishing method (CMP method) has been popularly used. The CMP process is a process which flattens the semiconductor device by polishing irregularities formed on a surface of an oxide film or a metal film formed on a semiconductor device.
Steps having a maximum height of several 100 nm before performing are reduced to several 10 nm after the CMP treatment. To check an effect of leveling by the CMP process, various surface measuring methods and simulation methods have been adopted.
(1) Japanese Laid-open Patent Publication 306871/2000, Japanese Laid-open Patent Publication 186205/1999 and the like disclose a method for predicting the height after CMP polishing based on simulations.
(2) Japanese Laid-open Patent Publication 21317/2001 discloses means for inspecting a surface height deviation after CMP polishing using an optical measurement.
(3) Japanese Laid-open Patent Publication 332073/2000 discloses a method and device for inspecting a semiconductor substrate.
(4) Japanese Laid-open Patent Publication 251524/1993 discloses a method which determines a measuring position of a contact type measuring device using mask data.
SUMMARY OF INVENTION
The method which predicts irregularities after CMP polishing based on simulations is disclosed in many other literatures besides the above-mentioned known example (1) and the progress of the study on polishing of an oxide film using CMP has been particularly noticeable. However, when the surface uniformity of a semiconductor device is predicted based on only the simulations, since parameters of the simulations are fluctuated in response to delicate changes of the process, it is not always possible to obtain the surface height deviation with an accuracy which falls in a range of several nm to several tens nm.
The above-mentioned known example (2) evaluates irregularities after CMP polishing by the measurement. To perform the evaluation of irregularities after CMP polishing, positional resolution of &mgr;m order and the height resolution of nm order are necessary and hence, it takes several ten minutes to several hours to evaluate the whole semiconductor device, that is, the whole semiconductor chip or the whole wafer. Accordingly, the inspection of the whole wafer to be polished remarkably deteriorates the throughput and hence, it is difficult to exercise the known example (2).
The inspection method of the semiconductor substrate disclosed in the above-mentioned known example (3) also requires a long measuring time and hence, it is difficult to apply this method to the detailed inspection of all wafers.
The above-mentioned known example (4) also has the same problems.
Accordingly, it is an advantage of the present invention to provide a method and device for inspecting a surface of a semiconductor device provided with means which can efficiently measure the surface uniformity of a polished semiconductor device based on measured data at several points within the chip surface.
To achieve the above-mentioned advantage, the present invention proposes a method for inspecting a surface of a semiconductor device being characterized in that exposure mask data for a semiconductor device is divided into arbitrary regions, in an arbitrary region j of the exposure mask data, &rgr;j=Pj/Sj which is a ratio between an area Sj of the region j and an area Pj of a portion in the region j where a pattern is present is calculated, a surface height deviation Hj of the semiconductor after chemical mechanical polishing is obtained by a simulation which is performed using, as parameters, the ratio &rgr;j, a size h of a step on a surface of the semiconductor device before polishing, a polishing speed K of a chemical mechanical polishing device, Young's modulus G of a polishing pad, a half-value width Rc of a stress function and a thickness d of the polishing pad, surface height deviations Hej are measured at at least two divided regions, the surface height deviation Hj after the chemical and mechanical polishing and the measured surface height deviations Hej are compared with each other, values of the polishing speed K, the Young's modulus and the half-value width Rc are changed until the surface height deviation Hj after chemical and mechanical polishing agrees with the measured surface height deviations Hej at least in portions of the regions, and surface height deviations after polishing are simulated using values of the polishing speed K, the Young's modulus G, the half-value width Rc and the thickness d which are newly obtained by the change and surface height deviations of regions where the above-mentioned measured surface height deviations Hej are not present are determined.
According to this invention, it is possible to know the surface height deviation distribution of the whole region of a semiconductor chip or a semiconductor wafer by measuring only extremely partial regions thereof and hence, the measuring time can be largely reduced.
In one aspect of the invention, when an object to be polished is a silicon oxide film or a silicon oxide film containing at least one kind selected from a group consisting of hydrogen, carbon, phosphorus and fluorine, a value of 0.5 mm to 2.0 mm is used as a value of the half-value width Rc of the stress function, and as a value K×G/(P×d) which is obtained by dividing a value of K×G with a pressure P with which the polishing pad comes into contact with the surface of the semiconductor device and a thickness d of the polishing pad, a value which falls in a range from 0.016 to 0.05 is used.
According to this aspect of the invention, it is possible to shorten the time from the measurement to the determination of the surface height deviation distribution while maintaining the inspection accuracy (accuracy with respect to position and height).
In another aspect of the invention, the values of the polishing speed K, the Young's modulus G and the half-value width Rc which minimize an error evaluation function &Sgr;j(Hj−Hej)
2
can be obtained by a least square method, and a surface height deviation after the chemical mechanical polishing at an arbitrary point on a semiconductor chip or a wafer can be obtained based on the value of the thickness d and the values of the polishing speed K, the Young's modulus G and the half-value width Rc which are obtained by the least square method.
According to this aspect of the invention, the surface height deviation distribution after polishing can be predicted in a shorter time.
In a still another aspect of the invention, a lowest point and a highest point in a surface height deviation before the chemical and mechanical polishing can be calculated to select as regions which constitute the objects to be measured of the surface height deviation Hej.
According to this aspect of the invention, a range of the surface height deviation distribution on the chip or the wafer can be obtained with an improved accuracy.
In a still another aspect of the invention, the exposure mask data can include exposure mask data of at least one layer which is present below a layer which constitutes an object to be polished.
According to this aspect of the invention, the prediction of the surface height deviation distribution can be made while taking the influence of irregularities of the lower layer into account and hence, high surface height deviation prediction accuracy is ensured even in case of a multi-layered film.
In a still another aspect of the present invention, the divided regions are, to be more specific, formed in square having a length of each side of 0.5 &mgr;m to 250 &mgr;m.
According to this aspect of the inven
Kobayashi Kinya
Ohtake Atsushi
LandOfFree
Method and device for assessing surface uniformity of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and device for assessing surface uniformity of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and device for assessing surface uniformity of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3271071