Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
1998-05-11
2001-02-27
Zarabian, A (Department: 2824)
Static information storage and retrieval
Floating gate
Multiple values
C365S185190, C365S185200
Reexamination Certificate
active
06195283
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a method and a device for analog programming of non-volatile memory cells, in particular flash memory cells.
BACKGROUND OF THE INVENTION
As is known, analog programming of a memory cell consists of modifying to a desired analog value the threshold voltage value of the cell (i.e., the minimum voltage to be applied between the gate terminals and the source of the cell itself, in order for the cell to begin to conduct current). Programming is currently carried out in a memory array by connecting the gate terminal of the cell to be programmed to a reference voltage, the drain terminal to a high programming voltage, and the source terminal to ground. Since the programming is a non-reproducible process, it is carried out in multi-level memories by providing a plurality of programming pulses of short duration, and by reading the threshold voltage value reached by the cell at the end of each programming pulse (verify step). In general during each programming pulse, the gate terminal of the cell to be programmed is supplied with a high programming voltage. In general the programming process is preceded by a cell erasing step, such that the cells have a low initial threshold voltage (lower than the minimum analog value to be stored) and each programming pulse gives rise to an increase of the threshold voltage of the cell; when the desired threshold voltage is reached, the programming process is interrupted. Generally speaking therefore, programming is carried out at present by gradually modifying the initial threshold voltage value through short programming pulses, followed by reading the reached level, until the desired level is obtained.
In order to avoid programming the cell excessively, the programming pulses are short, as indicated above, such that when a cell must sustain a large threshold jump, the described process requires a large number of programming/reading cycles, and thus involves a considerable programming time.
SUMMARY OF THE INVENTION
The invention is directed to a method and a programming device which permit reduction of the programming time of memory cells.
According to one embodiment of the present invention, a method for analog programming of non-volatile memory cells, for example flash memory cells, is provided. The method includes acquiring a desired programming value, detecting a value stored in the memory cell, detecting a difference value which is equal to the difference between the desired programming value and the stored value, and generating for the memory cell a programming pulse having a duration which is correlated to the difference value.
Furthermore, according to another embodiment of the invention, a device for analog programming of non-volatile memory cells, for example flash memory cells, is provided. The device includes input means for acquiring a desired programming value, reading means for determining a value stored in the memory cell, pulse modulation means determining a difference value equal to the difference between the desired programming value and the stored value, and generating a programming pulse for the memory cell, with a duration correlated to the difference value.
REFERENCES:
patent: 5629890 (1997-05-01), Engh
patent: 5675537 (1997-10-01), Bill et al.
patent: 5712815 (1998-01-01), Bill et al.
patent: 5768184 (1998-06-01), Hayashi et al.
patent: 5801991 (1998-09-01), Keeney
patent: 5903487 (1999-05-01), Wu et al.
patent: WO 90/00801 (1990-01-01), None
patent: WO 92/13350 (1992-08-01), None
patent: WO 96/08823 (1996-03-01), None
Gastaldi et al., “A 1-Mbit CMOS EPROM with Enhanced Verification,”I.E.E.E. Journal of Solid-State Circuits, Oct. 1988, No. 5, New York, USA, pp. 1150-1156.
Blyth et al., “A Non-Volatile Analog Storage Device Using EEPROM Technology,” I.E.E.E. International Solid-State Circuits Conference, Feb. 1991, New York, USA, 3 pages.
Canegallo Roberto
Chioffi Ernestina
Gerna Danilo
Pasotti Marco
Rolandi Pier Luigi
Galanthay Theodore E.
Iannucci Robert
Seed IP Law Group PLLC
STMicroelectronics S.r.l.
Zarabian A
LandOfFree
Method and device for analog programming of non-volatile... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and device for analog programming of non-volatile..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and device for analog programming of non-volatile... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2595166