Data processing: software development – installation – and managem – Software program development tool – Translation of code
Reexamination Certificate
1997-12-27
2001-08-14
Powell, Mark R. (Department: 2122)
Data processing: software development, installation, and managem
Software program development tool
Translation of code
C717S152000, C717S152000, C717S152000, C717S152000, C711S103000, C711S104000, C711S105000
Reexamination Certificate
active
06275982
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to computer programs, particularly those incorporated into microcircuit supports, and more generally portable objects equipped with integrated circuits comprising at least one central processing unit, one read-only program memory, one nonvolatile programmable memory and one working memory. This nonvolatile memory is capable of storing data and code, and the central processing unit executes this code.
DESCRIPTION OF RELATED ART
At the present time, it is known to have two very different types of programs coexisting in the same object, one of which is written into the integrated circuit upon fabrication and cannot be modified, the other of which is input from the outside during normal utilization of the object, as necessary.
At this time, microcircuit supports are technically capable of meeting numerous needs. However, the production of a “mask,” that is, the program in ROM memory, is still very expensive, and this cost discourages many “small” customers who would be interested in purchasing a few thousand cards. One solution would consist of using an existing mask and adding the functions requested by the client into the programmable memory.
The capability to input and execute additional code in programmable memory offers the advantage of being able to easily add new functions to an existing program or to adapt this program to specific needs.
French patent 2 655 170 which corresponds to U.S. Pat. No. 5,202,923; describes a portable electronic device capable of writing code sequences into a nonvolatile memory. The nonvolatile programmable memory comprises a specific part configured for the purpose of containing code sequences, which part is itself divided into an indicator area, a code sequence data area, and a block check character area. A test instruction is implemented in the program in read-only memory in order to read and test the indicator area, and if possible to execute the jump. Therefore, there must be a test instruction and an allocated storage area in programmable memory corresponding to each jump.
Also known, from French patent 2 667 417, is a microprocessor card designed to receive multiple programs into programmable memory wherein so-called filtering instructions are associated with each of the reserved locations in programmable memory so as to constitute a means for storing the address of the code of an instruction subroutine accessible by executing the filtering instruction stored in the read-only memory of the card. Each filtering instruction must know the address of the storage area containing the address of the associated code in the programmable memory, which imposes a hierarchy of access that is permanently fixed.
The two solutions described above have the following drawbacks.
One skilled in the art wishing to implement several jump instructions must multiply the jump instructions in the program in read-only memory and the specific areas in programmable memory. If a large number of instructions of this type must be installed into the main program, the total space they occupy in read-only memory becomes substantial, to the detriment of the program space. Moreover, in the nonvolatile programmable memory, even if the subroutine is not written, its space is reserved as is that of the indicators, which takes up a substantial amount of space unnecessarily. Finally, once written, the subroutine cannot be modified. In short, this solution is only suitable for a limited number of jump instructions and a few subroutines, and does not in any way solve the problem of a substantial number of jumps and subroutines.
The subject of the present invention is a process and a device allowing the functionalities of a chip card to be changed without the drawbacks of the patents cited, particularly by allowing a larger number of calls to subroutines. In effect, the device according to the invention offers the advantage of being easy to implement in a program, of using very little code memory, of minimizing the memory size used, of being dynamic and allowing all kinds of modifications, or of optimizing the execution time.
SUMMARY OF THE INVENTION
For this reason, the device for executing code sequences in a support comprising an integrated circuit capable of executing code sequences, as well as a first memory containing a main program and possibly other code sequences executable by the integrated circuit, a second nonvolatile programmable memory possibly containing code sequences executable by the integrated circuit, and a third working memory, is characterized in that an orientation table contained in the second memory contains at least one field containing a code reference data element of first means (INS_INT) which make it possible
to verify the presence of a code reference,
to store in working memory the address data element associated with the reference of the code and to set a trap indicator DI, and of second means (INS_ORT) which make it possible
to test the trap indicator DI, and
to execute the jump to the address indicated by the contents of the working memory.
According to another characteristic, the address data element of a code sequence contained in one of the three memories associated with the code reference is calculated from the code reference.
According to another characteristic, a second field contains the address data element of a code sequence contained in one of the three memories.
According to another characteristic, the device comprises, in a possibly protected area of the programmable memory, a data element defining the first address and possibly the search direction for the first verification means.
According to another characteristic, the orientation table comprises an additional field indicating the next address in the table where the information corresponding to the next code reference is located.
According to another characteristic, the orientation table comprises an additional field which makes it possible to verify the integrity of the preceding fields and/or of the attached code sequence in comparison with the result supplied by a checksum calculating means.
According to another characteristic, the second means comprise means for storing in working memory an address to return to after a jump when a plurality of second means are available to execute a jump directed to the same sequence address.
According to another characteristic, the device comprises means CAI for preventing the writing of additional code, and means RCI for preventing a regeneration of the card.
Another object is to offer a process for recording new functionalities.
This object is achieved due to the fact that the process for writing a new code in a device as described herein, is characterized in that it is comprised of
receiving a write command;
verifying the presence of a first field constituting the code reference A, B, C, etc., and a second field representing the address AD_Cod_A, AD_Cod_B, AD_Cod_C, etc., associated with the code reference;
verifying that the value of the first address constituting the orientation table address AD_TAB is consistent;
verifying that no flag ECA is active;
checking that the reference supplied by the first field does not exist in the table;
setting the flag ECA in the protected area of programmable memory to the active state;
receiving and writing the information corresponding to the new code;
verifying that the operation has been executed correctly and updating the orientation table;
setting the flag ECA to the inactive state.
According to another characteristic, the operation for updating the table comprises a writing of the next address field in the orientation table with the address corresponding to the orientation word of the code which precedes the code written.
REFERENCES:
patent: 5202923 (1993-04-01), Kuriyama
patent: 5241634 (1993-08-01), Suzuki
patent: 5448578 (1995-09-01), Kim
patent: 5465349 (1995-11-01), Gernimi et al.
patent: 5542081 (1996-07-01), Geronimi
patent: 5625791 (1997-04-01), Farrugia et al.
patent: 5644539 (1997-07-01), Yamagami et al.
patent: 5682031 (1997-10-01)
CP8 Transac
Kondracki Edward J.
Miles & Stockbirdge P.C.
Powell Mark R.
Vo Ted T.
LandOfFree
Method and device enabling a fixed program to be developed does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and device enabling a fixed program to be developed, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and device enabling a fixed program to be developed will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2442260