Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – In compound semiconductor material
Reexamination Certificate
1999-12-09
2002-01-01
Flynn, Nathan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
In compound semiconductor material
C438S958000
Reexamination Certificate
active
06335562
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to digital circuits and more specifically to digital circuits made from GaAs and related compounds.
2. Description of the Background Art
Like all electronic devices, digital circuits execute the functions for which they are designed, through the careful control of charge flow within the circuit. The introduction of stray charge through leakage, temperature excursions or ionizing radiation can cause any electronic circuit to malfunction. Digital circuits, because of the low-voltages and currents inherent in the devices from which they are constructed, are extremely susceptible to stray charge.
Digital circuits, in particular high-speed digital circuits, are subject to a particular kind of stray charge associated fault, termed: A single-event upset (SEU). This fault occurs when a high-energy charged particle enters the substrate beneath the active layer in which the devices have been fabricated, and generates a large number of free electrons and holes which can subsequently flow to the biased nodes of the circuit as stray charge. The end result of this event is a loss of information stored in the digital memory or a malfunction in the execution of an instruction taking place in the digital processor at the time of the event.
Digital circuits which are placed in space, near a radioactive source or close to a nuclear explosion are particularly vulnerable to this SEU problem because these environments harbor a large flux of high-energy, charged particles. Current approaches to this single event upset problem are costly and inelegant to the point of being impractical or flawed in some regard such as incompatibility with established manufacturing processes. An example of the former is triple redundancy of the critical digital circuits. This is expensive not only from the point of view of the procurement of the hardware, but from the point of view of the complexity it introduces into the system and for space based systems in added weight, and complexity, both of which are highly undesirable. An example of the latter is the emerging use of an epitaxial layer of what is termed, Low-Temperature GaAs (LTGaAs), between the bulk wafer and the active layer that contains the circuits. This approach works with varying degrees of success, but has some degree of incompatibility with all current manufacturing approaches and is for all intents and purposes totally incompatible with one of the most frequently used approaches.
It should also be pointed out that the insertion of an LTGaAs layer between the active layer and the substrate wafer suppresses another deleterious source of stray current. This is what is termed subthreshold leakage. This is an unwanted current which flows in the digital circuits through a shunting path in the substrate, even when the individual devices are turned off.
The LTGaAs approach, relies on the picosecond lifetimes in the LTGaAs layer to solve the SEU problem. Charge generated in the bulk by the ionizing event, enters the LTGaAs where it is quickly annihilated through recombination; or prompt trapping, with the subsequent release of the stored charge on a time scale that does not impede the operation of the device. The use of LtGaAs, however, reduces the processability of a workpiece.
Kang et al (
Appl. Phys. Lett
., Vol 70, No 12, pp. 1560-1562) demonstrated that doping of GaAs with oxygen and aluminum can produce picosecond lifetimes. However, these workers used epitaxial layers grown by metal-organic chemical vapor deposition. The doping of layers during epitaxial growth inherently alters the surface of the doped layer, and can alter the processability of the doped workpiece.
SUMMARY OF THE INVENTION
Accordingly, it is an object of this invention to suppress single event upset in devices made using III-V substrates.
It is another object of this invention to suppress single event upset in devices made using III-V substrates without requiring the use of LTGaAs.
It is a further object of the present invention to suppress single event upset in devices made using III-V substrates while maintaining the processability of the workpiece.
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Kang et al.,Appl. Phys. Lett.70 (12), Mar. 24, 1997, pp 1560-1562.
Dietrich Harry B.
Frankel Michael Y.
Kang Jin U.
Molnar Bela
Flynn Nathan
Karasek John J.
Ressing Amy L.
The United States of America as represented by the Secretary of
Wilson Scott R.
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