Data processing: structural design – modeling – simulation – and em – Emulation – Of instruction
Reexamination Certificate
2005-07-26
2005-07-26
Picard, Leo (Department: 2125)
Data processing: structural design, modeling, simulation, and em
Emulation
Of instruction
C711S155000
Reexamination Certificate
active
06922666
ABSTRACT:
Atomic multiple word reads are provided when emulating a target system that supports atomic multiple word reads on a host system that does not. For each except the last word to be read, a gate flag is read using an advanced speculative load, and tested, until found unlocked. Check speculation instructions are utilized after the gate flag tests to verify that the corresponding cache lines have not been invalidated through a write by another processor since the speculative loads were issued. In a host system with a longer word size than the target system, the gate flags can be stored in otherwise unused bits in the host system words containing the target system words to be written.
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Intel corporation IA-64 Application Developer's Architecture Guide, May 1999.
Intel Corporation IA-64 Application Developer's Architecture Guide pp.: Contents iii through xii, 2-3, 2-4; 7-16, 7-17; 7-24, 7-25; 7-104, 7-105, 7-106, 7-107; 10-5, 10-6, 10-7, 10-8, 10-9, 10-10, 10-11.
Bull HN Information Systems Inc.
Hayden Bruce E.
Phillips James H.
Rodriguez Carlos Ortiz
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