Method and computer program product for synchronizing the proces

Computer graphics processing and selective visual display system – Display driving control circuitry – Controlling the condition of display elements

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345302, G06F 1700

Patent

active

058156895

ABSTRACT:
A method and computer program product for synchronizing processing between two or more data streams (e.g., video and sound input) and for rate matching between two different hardware clocks that may drift with respect to one another (e.g., an originating clock represented in a timestamped data stream versus a clock actually rendering the data) in a system of interconnected software drivers running in kernel mode. The present invention overcomes the coordination complexity and inaccuracies in the prior art by providing a clocking mechanism in a system wherein multiple drivers having input and output connection pin instances are chained together. The clocking mechanism synchronizes between data streams by providing a master clock on an input pin instance of a driver that is used to synchronize with other input pin instances on other drivers and "slave" clocks. Synchronization is achieved through event notification or stream position queries so that corresponding frames of data in separate streams are rendered together (e.g., video frames with corresponding sound track). Rate matching is achieved through monitoring a physical clock progression in comparison with a series of data stream timestamps thereby allowing adjustments to match the different clock rates. A common physical clock (e.g., PC clock) can be used as a reference for a component to translate a particular clock time to a time shared by all components with a minimum of error.

REFERENCES:
patent: 4780893 (1988-10-01), Henkelman, Jr.
patent: 5608651 (1997-03-01), Leavy et al.
patent: 5623483 (1997-04-01), Agrawal et al.
patent: 5625845 (1997-04-01), Allrao et al.

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