Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing
Reexamination Certificate
2002-02-13
2003-07-15
Gandhi, Jayprakash N. (Department: 2125)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Product assembly or manufacturing
C700S090000, C700S121000, C700S028000, C438S907000
Reexamination Certificate
active
06594536
ABSTRACT:
BACKGROUND
(1) Field of the Invention
This invention relates to methods of scheduling wafer lots for processing and more particularly to using tool performance capability and wafer lots awaiting processing to dynamically match tools to wafer lots to optimize wafer output.
(2) Description of the Related Art
U.S. Pat. No. 5,612,886 to Weng describes a manufacturing control system using computer control of work flow for automatic production line control.
U.S. Pat. No. 5,818,716 to Chin et al. describes a dispatching algorithm for controlling work flow in a semiconductor manufacturing factory.
U.S. Pat. No. 5,838,565 to Hsieh et al. describes a method of operating a batch sequential machine in a manufacturing plant to optimize processing lots of work through a plurality of processing stations.
U.S. Pat. No. 5,841,677 to Yang et al. describes a method and apparatus for dispatching lots in a factory.
U.S. Pat. No. 5,930,137 to Togashi describes a work supply method and apparatus for a batch process apparatus for semiconductor wafers by which work with a high priority is processed preferentially.
SUMMARY OF THE INVENTION
In semiconductor wafer fabrication facilities there is frequently a number of wafer lots waiting for processing than there are processing tools to process the lots. In addition to having more wafer lots waiting than tools available it is desirable to maximize the wafer output of the processing tools.
It is a principle objective of this invention to provide a method of matching wafer lots to available processing tools in order to maximize the output of the available processing tools.
It is another principle objective of this invention to provide a computer program for matching wafer lots to available processing tools in order to maximize the output of the available processing tools.
These objectives are achieved by gathering information for the wafer lots waiting to be processed and the processing tools capable of performing the processing. The wafers in each of the wafer lots are to be processed according to a particular processing recipe. The information for the wafer lots includes the number of wafers in each lot, the processing recipe to be used for each wafer lot, and whether any wafer lots require priority processing. The processing tools process the different recipes at different wafer per hour rates. The information for the processing tools includes the wafer per hour capability for each processing recipe.
As a first step the wafer lots with priority are identified and given precedence for associating with available processing tools. Next all the possible permutations of non priority wafer lots and processing tools are determined. The longest process time for each permutation is then calculated. A permutation wafers per hour, PWPH, is then calculated for each of the permutations. The PWPH is equal to the total number of wafers processed for each permutation of non priority wafer lots and tools divided by the longest process time for that permutation.
Next the permutations having the highest PWPH are selected. If only one permutation has the highest PWPH that permutation is selected for processing. If more than one permutation has the highest PWPH the total wafer per hour, TWPH, is calculated for the permutations having the highest PWPH. The TWPH is equal to the sum of the wafer per hour capability of each tool in the permutation. The permutations with the highest PWPH and highest TWPH are then identified. If only one permutation has the highest PWPH and the highest TWPH that permutation is selected for processing. If more than one permutation has the highest PWPH and the highest TWPH,any one of the permutations having the highest PWPH and the highest TWPH is selected for processing.
This method is then repeated for the remaining wafers to identify the next permutation for processing and continues until all the waiting non priority wafers are processed. At any time wafer lots with high priority are given precedence for available tools.
REFERENCES:
patent: 5612886 (1997-03-01), Weng
patent: 5818716 (1998-10-01), Chin et al.
patent: 5838565 (1998-11-01), Hsieh et al.
patent: 5841677 (1998-11-01), Yang et al.
patent: 5930137 (1999-07-01), Togashi
Chen Ni-Chung
Lin Chien-Yu
Liu Li-Wen
Wen Liao-Hon
Ackerman Stephen B.
Gandhi Jayprakash N.
Prescott Larry J.
Saile George O.
Taiwan Semiconductor Manufacturing Company
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