Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate
2011-06-07
2011-06-07
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Logic design processing
C716S113000, C716S134000
Reexamination Certificate
active
07958473
ABSTRACT:
A method and a computer program for configuring an integrated circuit design for static timing analysis include receiving module data representative of a hierarchy of modules in an integrated circuit design. A configuration item is selected from a list of configuration items for at least one of the modules. The module data is configured for the module from the selected configuration item into a static timing analysis scenario for performing a static timing analysis of the configured module data.
REFERENCES:
patent: 6324678 (2001-11-01), Dangelo et al.
patent: 2004/0128641 (2004-07-01), Broberg et al.
Bambynek Ansgar
Dirks Juergen
Elsholz Udo
Habel Stephan
Dinh Paul
LSI Corporation
Luedeka Neely & Graham P.C.
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