Method and circuitry to provide true voltage bias to a magnetore

Dynamic magnetic information storage or retrieval – General recording or reproducing – Specifics of biasing or erasing

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360113, G11B 503

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active

053092945

ABSTRACT:
The present invention is directed to a circuit and method for nullifying a drop in the voltage across an MR head caused a parasitic cable resistance. The invention uses local modeling of the cable resistance in order to generate a nulling voltage, equal in magnitude to the voltage across the cable resistance. The magnitude of the nulling voltage is adjusted as the resistance of the MR head varies within a population of heads. The nulling voltage is added to the bias voltage, in order to negate the effect of the cable resistance.

REFERENCES:
patent: 3745478 (1973-07-01), Affinito
patent: 3979399 (1976-08-01), Chadbourne
patent: 4290023 (1981-09-01), Greenfield
patent: 4706138 (1987-11-01), Jove et al.
patent: 4712144 (1987-12-01), Klaassen
patent: 4743861 (1988-05-01), Jove et al.
patent: 4786993 (1988-11-01), Jove et al.
patent: 4914398 (1990-04-01), Jove et al.
K. B. Klaassen, "Magnetic Recording Channel Front-Ends", Pre-print for Nov. 1991 IEEE Trans. on Magnetics, 6 pages.
IBM Technical Disclosure Bulletin, vol. 26, No. 12 May 1984 pp. 6626-6628.

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