Static information storage and retrieval – Addressing – Sync/clocking
Patent
1995-03-09
1996-10-08
Nelms, David C.
Static information storage and retrieval
Addressing
Sync/clocking
365233, 36518533, 36518905, G11C 800
Patent
active
055638430
ABSTRACT:
An Address Transition Detection (ATD) circuit for use in memory devices. The ATD circuit includes a pulse generator for generating an ATD pulse. For asynchronous memory device, the pulse generator generates the ATD pulse in response to an address transition, wherein for synchronous devices, the pulse generator generates the ATD pulse in response to control signals that indicate a valid address. The ATD circuit also includes a control circuit and a mask circuit. The control circuit is operative to asserting a first control signal in response to receiving the pulse. The mask circuit is coupled between the output of the pulse generator and the control circuit for preventing propagation of the ATD pulse if the first control signal is active.
REFERENCES:
patent: 5222046 (1993-06-01), Kreifels et al.
patent: 5243575 (1993-09-01), Sambandan et al.
patent: 5265064 (1993-11-01), Davies et al.
patent: 5313435 (1994-05-01), Kim et al.
patent: 5414672 (1995-05-01), Ozeki et al.
patent: 5418479 (1995-05-01), Sambandan
Fackenthal Richard E.
Mills Duane R.
Hoang Huan
Intel Corporation
Nelms David C.
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