Static information storage and retrieval – Format or disposition of elements
Patent
1991-12-12
1995-01-10
Harvey, Jack B.
Static information storage and retrieval
Format or disposition of elements
365 63, 365154, 36518904, 36518905, 365203, G11C 502, G11C 506, G11C 700
Patent
active
053813634
ABSTRACT:
Circuitry for overlapping a write access of a read-modify-write of a first bit with a subsequent read access of a second bit is described. The circuitry includes a latching circuit and a modify-write circuit. The latching circuit latches the active state of a select signal, which is used to select the SRAM cell storing the first bit during read and write accesses. The modify-write circuit modifies the first bit during the precharge preceding a read access of the second bit provided that it receives an active update write enable signal and an active signal from the latching circuit. Also described is a method of overlapping a read-modify-write cycle of a first SRAM bit with a subsequent read access of a second SRAM bit. The method begins by reading the first SRAM bit. Next, the second SRAM bit is precharged by bringing a precharge signal active. While the precharge signal is active the first SRAM bit is modified. Finally, the second SRAM bit is read after the precharge signal goes inactive.
REFERENCES:
patent: 5031141 (1991-07-01), Guddat et al.
patent: 5065365 (1991-11-01), Hirayama
patent: 5235543 (1993-08-01), Rosen
Harvey Jack B.
Intel Corporation
Whitfield Michael A.
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