Oscillators – L-c type oscillators
Reexamination Certificate
2001-02-24
2003-05-20
Lee, Benny (Department: 2817)
Oscillators
L-c type oscillators
C331S03600C, C331S17700V
Reexamination Certificate
active
06566971
ABSTRACT:
BACKGROUND OF THE INVENTION
The convergence of various high speed data communication technologies (e.g., Ethernet, fiber channel, IEEE firewire links) into the gigabit domain has focused the efforts of integrated circuit designers on developing high speed circuit techniques for processing broadband signals. A circuit block that is commonly found in these types of communication applications is a voltage-controlled oscillator (VCO). As the main building block of phase-locked loops (PLLs), the VCO can be found, for example, in clock and data recovery circuits.
The VCO is typically an important element in determining the overall noise performance of a PLL. Since the VCO is the part of the PLL which produces an ac output signal whose frequency is proportional to the input control signal, external unwanted noise affecting the input control signal has an adverse impact on the performance of the PLL. Hence, it is desirable to provide a VCO whose input control signal is less susceptible to noise interference thereby improving the performance of the PLL.
Furthermore, conventional VCOs are constructed to provide a single-ended output signal.
FIG. 1
is a simplified circuit diagram showing a conventional design of a VCO. Under this conventional design, the VCO includes an active circuit (or driver)
10
having a couple of terminals A, B, an inductor-capacitor (LC) tank circuit
12
and a couple of variable capacitors (or varactors)
14
,
16
connected in series.
The LC tank circuit
12
and the varactors
14
,
16
are connected in a parallel manner across the terminals A, B. The input control signal V
tune
is connected to the node between the two varactors
14
,
16
. As
FIG. 1
shows, the input control signal V
tune
is single-ended.
Due to their single-ended nature, single-ended signals, however, are more susceptible to noise interference. It is, therefore, desirable to provide a VCO implemented in CMOS technology based on an inductor-capacitor (LC) oscillator structure that uses differentially controlled varactors.
SUMMARY OF THE INVENTION
The present invention generally relates to voltage-controlled oscillators. More specifically, the present invention relates to method and circuitry for implementing a differentially tuned varactor-inductor oscillator implemented using CMOS technology.
In one exemplary embodiment, the present invention includes an LC tank circuit having a couple of terminals, a first and second capacitors, and a first and second varactors. The first and second varactors are connected in series forming a first and a second node. The first capacitor connects the first node and one terminal of the LC tank circuit. The second capacitor connects the second node and the other terminal of the LC tank circuit. A pair of differential input control signals is applied across the first and the second varactors to tune the LC tank circuit thereby generating an oscillator output.
Accordingly, in one embodiment, the present invention provides a voltage-controlled oscillator including: an LC tank circuit, a plurality of varactors each having a first and a second terminal; and a plurality of capacitors respectively coupling said LC tank circuit to said plurality of varactors; wherein, a pair of differential input control signals are applied across said first and second terminals of each of said plurality of varactors to tune said LC tank circuit so as to generate an oscillator output.
Accordingly, in another embodiment, the present invention provides a method for implementing a voltage-controlled oscillator including: connecting a first varactor and a second varactor in series thereby forming a first and a second node; coupling a first capacitor between an LC tank circuit and said first node; coupling a second capacitor between said LC tank circuit and said second node; and applying a pair of differential input control signals across said first varactor and said second varactor respectively.
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Rategh et al.,A CMOS Frequency Synthesizer with an Injection-Locked Frequency Divider for a 5-GHz Wireless LAN Receiver, IEEE Journal on Solid-State Circuits, vol. 35, No. 5, pp. 780-787, May 2000.
Samavati, et al,A 5-GHz CMOS Wireless LAN Receiver Front End, IEEE Journal on Solid-State Circuits, vol. 35, No. 5, pp. 765-772, May 2000.
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Capofreddi et al., “A Clock and Data Recovery IC for Communications and Radar Applications,” Proc. of the Third International Workshop on Design of Mixed-Mode Integrated Circuits, Puerto Vallarta, Mexico, Jul., 1999, pp. 88-90.
Lin et al., “A 1.4 GHz Differential Low-Noise CMOS Frequency Synthesizer using a Wideband PLL Architecture,” 2000 IEEE International Solid State Circuits Conference, Aug., 2000, 2 pages.
Ainspan, et al., “A Comparison of MOS Varactors in Fully-Integrated CMOS LC VCO's at 5 and 7 GHz,” Proceedings of the 26th European Solid-State Circuits Conference, Stockholm, Sweden, Sep. 19-21, 2000, pp. 448-451.
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Broadcom Corporation
Glenn Kimberly E
Lee Benny
Ng Horace H.
Townsend and Townsend / and Crew LLP
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