Method and circuitry for generating r-bit parallel CRC code for

Details Method and circuitry for generating r-bit parallel CRC code for Method and circuitry for generating r-bit parallel CRC code for

1995-10-31

1997-09-23

Baker, Stephen M.

Excavating

H03M 1300

Patent

active

056712383

ABSTRACT:
A method for generating r-bit parallel CRC code for a data source grouped into at least one successive p-bit parallel data group and a q-bit parallel data group is disclosed. The number q is less than the number p. The method includes the steps of: providing a data processing unit which has an output side and an input side that is adapted to receive successively the p-bit and q-bit parallel data groups, the processing unit reflecting one of the p-bit parallel data groups at the input side to the output side when the p-bit parallel data group is present at the input side, the processing unit adding a bit string to the q-bit parallel data group such that sum of the number q and number of bits in the bit string is equal to the number p, the processing unit presenting the q-bit parallel data group and the bit string at the output side when the q-bit parallel data group is present at the input side; providing a binary output generating unit which operates in response to data at the output side to produce an r-bit parallel initial CRC code according to a predefined generating polynomial function; and providing a code correcting unit which receives the r-bit parallel initial CRC code from the generating unit and which operates in response to the parallel initial CRC code to produce an r-bit parallel final CRC code according to a predefined code correcting function.

REFERENCES:
Hsiao et al., "Serial-to-Parallel Transformation of Linear-Feedback Shift-Register Circuits", IEEE Transactions on Electronic Computers, Dec. 1964, pp. 738-740.
Boudreau et al., "Parallel CRC Generation for Multilength Characters", IBM Technical Disclosure Bulletin, vol. 15, No. 4, Sep. 1972, pp. 1314-1315 Sep. 1972.

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