Method and circuitry for extracting clock in clock data...

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data

Reexamination Certificate

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C375S360000, C375S363000, C375S367000

Reexamination Certificate

active

07616722

ABSTRACT:
A method for extracting a clock in a clock data recovery system is provided. The method includes the following steps. First, a serial link transmission data is sampled for a plurality of times, and a plurality of pulse signals are generated and sequentially arranged. Then, a mark is inserted after all pulse signals are generated and had been delayed for a predetermined delay time. The predetermined delay time is less than a period between two adjacent pulse signals, and a period between two adjacent pulse signals is divided into two sub-periods by the predetermined delay time. Then, it is checked whether the data status in each sub-period is changed or not, and this operation is repeated for a predetermined number of times. Finally, the clock is extracted when a pulse signal of no data status change within the predetermined number of times is being generated.

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patent: 6545507 (2003-04-01), Goller
patent: 7020227 (2006-03-01), Wang et al.
patent: 7265690 (2007-09-01), Vining
patent: 2002/0157062 (2002-10-01), Greiner
patent: 2004/0165679 (2004-08-01), Kwak
patent: 2004/0190667 (2004-09-01), Matsuura
patent: 2005/0071713 (2005-03-01), Vining
patent: 2006/0034394 (2006-02-01), Popescu et al.
patent: 2006/0050828 (2006-03-01), Otomo et al.

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