Method and circuit of soft start and of power monitor for IC...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

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Reexamination Certificate

active

06320439

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to integrated digital circuits, and, more particularly, to a procedure for monitoring all the power supplies within an integrated circuit (IC). This monitoring is a function referred to as power monitoring.
BACKGROUND OF THE INVENTION
Integrated systems tend to have several subsystems and power sections integrated on a single chip. These devices commonly use different positive power supplies, and often use negative power supplies to power in the most efficient manner the different chip sections or the various subsystems integrated on the same chip.
Sometimes one or more supply voltage sources are externally provided, while others are implemented internally by as many voltage regulators as there are externally generated supply voltages. In these monolithic integrated complex systems, it is very important to monitor the level of all the different supply voltages and to generate a so-called NPOR signal stating their compliance or noncompliance with their respective design values.
For an integrated system with one or more regulators generating as many supply voltages within the integrated circuit, it may be crucial to verify that all the supply voltages that are either fed to the IC or generated internally have reached pre-established values before enabling functioning of the integrated circuit.
Conventionally, this verification is acknowledged at the end of the charging process via a capacitor charged with a relatively low constant current to prevent the functional circuits from producing false switchings because of an insufficient supply voltage at the turn-on of the IC. Because the capacitor must be charged within a few milliseconds, it must have a relatively high capacitive value. This capacitor is commonly an external capacitor connected to a dedicated pin of the IC.
The assertion that all the supplies of the functional circuits of the integrated circuit have reached their pre-established values is done conventionally by forcing the NPOR signal to a high logic level. On the other hand, many electronic systems implement a turn-on method that is commonly referred to as soft start to avoid an abrupt application of the full supply voltages to the IC. Even for this well known soft start function, a relatively slow charging external capacitor having a large capacitance is the common way of implementation.
It is evident the burden implied by the use of distinct external capacitors, one for the soft start function and the other for the power monitor function. Each capacitor respectively requires a dedicated pin on the IC.
SUMMARY OF THE INVENTION
In view of the foregoing background, an object of the present invention is to provide a method and a power monitor circuit for generating a NPOR signal representing the state of the power supplies while using a single external capacitor. This external capacitor is charged with a constant current from a suitable current generator integrated in the device that is used to implement a soft start function of the IC.
This and other objects, advantages and features are provided by a method comprising disabling of a first discharge path of the external capacitor when the presence of the externally provided supply voltage(s) is acknowledged allowing the start of the external capacitor charge ramp towards a certain regulated voltage.
At least a first replica of the charge ramp is generated, and optionally an inverted second replica of the charge ramp is generated. The replicated voltage ramps are respectively supplied to the regulators that generate positive supply voltages and to the regulators that generate negative supply voltages, respectively for activating the soft start.
The method further includes monitoring a signal of assertion that the values of all the externally provided and internally generated supply voltages are correct. Continuation or interruption is conditioned for charging the external capacitor towards the regulated charge voltage for overcoming a first pre-established level of the charge voltage on the external capacitor. This coincides with the end of the soft start procedure by keeping disabled or enabled a second discharge path of the external capacitor until the assertion signal is raised.
The end of the turn-on procedure is established by charging the capacitor to a second pre-established voltage which causes a transition from low to high of the NPOR signal. The NPOR signal will remain high as long the signal of assertion is absent for a period of time greater than a pre-established minimum time interval.


REFERENCES:
patent: 5063303 (1991-11-01), Sackman et al.
patent: 5264782 (1993-11-01), Newton
patent: 5710701 (1998-01-01), Brown
patent: 6084389 (2000-07-01), Gens et al.
patent: 871037 (1998-10-01), None
patent: 709949 (1996-05-01), None

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