Method and circuit of plasma damage protection

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Reexamination Certificate

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C365S115000, C365S116000

Reexamination Certificate

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07116606

ABSTRACT:
A protection circuit to discharge plasma-induced charges in a semiconductor device or integrated circuit includes a PMOS transistor and a diode. The PMOS transistor includes a substrate, a drain, a source, and a gate, the source being coupled to receive the plasma-induced charges. The diode has a positive terminal coupled to the substrate of the PMOS transistor and a negative terminal coupled the gate of the PMOS transistor.

REFERENCES:
patent: 5587598 (1996-12-01), Hatanaka
patent: 5760445 (1998-06-01), Diaz
patent: 5946574 (1999-08-01), Hsiao
patent: 6297984 (2001-10-01), Roizin
patent: 6329691 (2001-12-01), Finzi
patent: 6410964 (2002-06-01), Shida
patent: 6437408 (2002-08-01), Shih et al.
patent: 6683351 (2004-01-01), Morita et al.
patent: 2004/0007730 (2004-01-01), Chou et al.

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