Pulse or digital communications – Testing
Reexamination Certificate
1998-10-05
2002-05-07
Pham, Chi (Department: 2631)
Pulse or digital communications
Testing
C375S219000, C375S221000, C370S249000
Reexamination Certificate
active
06385236
ABSTRACT:
BACKGROUND
The present invention relates generally to circuits and methods for testing devices, and relates more specifically to a circuit and method which can be used to test products with serial data links, such as transceivers, thereby improving the testability of these devices.
Some examples of devices or products which generally include serial data links include hard disk drives, printers, digital cameras, etc. Generally, a serial data link provides that a transceiver is located at each end of a serial cable. Each transceiver transmits and receives signals, and is connected to a controller through a parallel interface. The transmitter of each transceiver receives parallel data (i.e. data in a parallel data stream) from the respective controller to which that transceiver is connected, converts the data into a serial data stream, and then transmits the serial data into the cable and to the other transceiver. The receiver of the other transceiver receives the incoming serial data stream, recovers an embedded clock signal, re-times the data, does a serial-to-parallel conversion, and then sends the data to the other, respective controller (through the parallel interface).
In recent years, many serial link standards have been proposed to improve the input/output (I/O) performance of different computer systems. Some examples of serial link standards which have been proposed in recent years include the 1394, Fibre Channel and Gigabit Ethernet serial data link standards, as well as others.
When a device with a serial data link fails, generally there is no easy way to determine whether the failure was caused by the serial transceiver of the serial data link, or by other components in the device. For example, when data is to be written to a disk drive, the data is communicated to the disk drive through a 1394 serial data link, for example, and the data which is actually written to the disk is supposed to be identical to the data which was originally communicated to the disk drive through the 1394 serial data link. If the data actually written to the disk is inconsistent with the data which was originally communicated to the disk drive through the 1394 serial data link (i.e. there is corruption), it is generally relatively difficult to determine, without opening the cover of the disk drive and testing each individual component, if the inconsistency (i.e. failure) was caused by a transceiver which malfunctioned, or instead by some other component of the disk drive.
A transceiver can be tested in a factory before being incorporated into a finished product (e.g. into a hard disk drive, a printer, a digital camera, etc.). For example, bit error rate tests can be performed by generating a pre-determined bit pattern, communicating the bit pattern to a receiver of the transceiver, and then comparing the data received at the output of the receiver to the data which was fed to the input of the receiver.
However, once a transceiver is incorporated into the finished product, generally there is no easy way to test the transceiver. This is because the parallel interface of the transceiver is usually connected directly to a controller, as discussed above, and the transceiver is not accessible without opening the case. Consequently, should the finished product fail, it is generally relative difficult to determine whether the failure has occurred as a result of a transceiver which has malfunctioned.
A loopback function is sometimes used in association with a transceiver to perform some relatively basic self-test functions. The loopback function effectively loops back the signal at the serial data interface. In other words, the transmitter of the transceiver is connected to the receiver portion of the same transceiver (as opposed to that of another transceiver) through a serial cable. The usefulness of such a loopback is somewhat limited due to the fact that the quality of the signal, such as its amplitude, rise and fall time, jitter, etc., cannot be controlled to any great extent. Furthermore, this type of loopback does not provide that a bit error rate test, as described above, can be performed on a transceiver which is incorporated in a finished product.
SUMMARY AND OBJECTS
It is an object of the present invention to provide a circuit which makes it possible to test a transceiver which is incorporated in a finished product, such as in a hard disk drive, a printer, a digital camera, etc., without having to open or otherwise disassemble the product.
It is a further object of the present invention to provide a method which effectively improves the testability of products with serial data links.
Briefly, and in accordance with at least one of the foregoing objects, the present invention provides a circuit for testing a transceiver. The circuit includes a bit pattern generator connected to the transceiver such that the bit pattern generator can communicate a serial data stream to a receiver portion of the transceiver. The circuit also includes a bit pattern checker connected to the transceiver such that a transmitter portion of the transceiver can communicate a serial data stream to the bit pattern checker. The transceiver is configured such that the receiver portion of the transceiver is communicatingly looped back to the transmitter portion of the transceiver such that a data stream can be communicated from the receiver portion of the transceiver to the transmitter portion of the transceiver.
Desirably, the receiver portion of the transceiver is connected to the transmitter portion of the transceiver such that the receiver portion can communicate a parallel data stream to the transmitter portion of the transceiver, and a loopback circuit connected between the receiver portion of the transceiver and the transmitter portion of the transmitter portion of the receiver. The loopback circuit preferably includes a FIFO component configured for receiving the parallel data stream from the receiver portion of the transceiver, and includes fixed bit pattern means for communicating at least one fixed bit pattern to the transmitter portion of the transceiver. Specifically, preferably the loopback circuit is configured such that the FIFO component receives a set of bits from the receiver portion of the transceiver and at least one of the bits in the set is replaced by the fixed bit pattern before being communicated to the transmitter portion of the receiver. A first fixed bit pattern may be communicated to the transmitter portion of the transceiver when an underflow situation occurs in the FIFO component, and a second fixed bit pattern may be communicated to the transmitter portion of the transceiver when an overflow situation occurs in the FIFO component.
Such a method and configuration makes it possible to test a transceiver which is incorporated in a finished product, such as in a hard disk drive, a printer, a digital camera, etc., without having to open or otherwise disassemble the product.
REFERENCES:
patent: 3869580 (1975-03-01), Ragsdale
patent: 3869603 (1975-03-01), Auspurg et al.
patent: 4580274 (1986-04-01), Debany, Jr. et al.
patent: 5099480 (1992-03-01), Murata
patent: 5148435 (1992-09-01), Ray, Jr. et al.
patent: 5553059 (1996-09-01), Emerson et al.
patent: 5557437 (1996-09-01), Sakai et al.
patent: 5631644 (1997-05-01), Katata et al.
patent: 5703479 (1997-12-01), Wieczorek et al.
patent: 5838900 (1998-11-01), Horvath et al.
patent: 5856999 (1999-01-01), Robinson et al.
patent: 5875210 (1999-02-01), Brief et al.
patent: 5883907 (1999-03-01), Hoekstra
patent: 5953372 (1999-09-01), Virzi
patent: 5956370 (1999-09-01), Ducaroir et al.
patent: 5974584 (1999-10-01), Hendrickson et al.
patent: 6052362 (2000-04-01), Somer
patent: 6173423 (2001-01-01), Autechaud et al.
patent: 6215817 (2001-04-01), Kimura
patent: 6222380 (2001-04-01), Gerowitz et al.
patent: 6321361 (2001-11-01), Autechaud et al.
Bayard Emmanuel
LSI Logic Corporation
Pham Chi
Trexler, Bushnell Giangiorgi, Blackstone & Marr, Ltd.
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