Coded data generation or conversion – Converter calibration or testing
Reexamination Certificate
1999-02-11
2001-10-02
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Converter calibration or testing
C341S118000
Reexamination Certificate
active
06297757
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to analog-to-digital converters (ADCs), and more particularly, to a circuit for, and method of, testing an ADC.
BACKGROUND OF THE INVENTION
ADCs are used in a variety of applications for converting analog signals to their equivalent digital signals as stand alone ADCs or as an embedded ADC module on board data processing systems, such as a microprocessor or a microcontroller. To ensure that the ADC is reliable, the ADC is tested using a variety of tests over a full range of input and output values by performing numerous test conversions, i.e. analog to digital conversions, on the ADC. In an ADC integrated on a microcontroller, this testing is typically performed by first sending testing control information to the ADC through an on-chip internal bus, where the internal bus is used to interconnect the various modules of the microcontroller with each other and to a central processing unit (CPU). The testing control information is used to place the ADC in a particular test mode. Next, thousands of test conversions are performed on the ADC. Then, the test results of the test conversions are returned through the internal bus to determine if the ADC is functioning properly.
Several problems exist with this testing protocol. First, because the internal bus is needed for retrieving the test results, using the internal bus for concurrent testing of other modules located on a microcontroller, for example, is not possible during the testing of the ADC. This “heavy usage” of the internal bus slows down the testing of modules on the microcontroller and thereby increases costs. This is particularly true since this type of testing subjects the ADC to thousands of test conversions when all of the different operating modes, conversion parameters and result memory locations must be tested. Secondly, the use of the internal bus for receiving results of special tests of the ADC affects the test quality.
Two factors that affect the test quality of the ADC testing are the controllability of each test conversation and the observability of the resulting test during the test conversion to locate ADC testing problems, particularly in embedded ADCs where the test conversion is not easily monitored. The use of the internal bus deteriorates the test quality because each of the special ADC tests is not easily observed and controlled when using the internal bus in this manner and thereby limits debugging capabilities, fault grading and characterization of circuits being tested. Thus, the test quality of the ADC would improve if alternative paths, other than the internal bus, were used to improve control and observability of each test.
A need therefore exists to improve the testing of ADCs by reducing the time and costs needed to test the ADC, as well as to improve the quality of those tests.
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Jose A Lyon et al., Motorola, Inc., “Testability Features of the 68HC16Z1”, International Test Conference 1991, Paper 5.1, 1991 IEEE, pp. 122-130.
Clyde Browning, Motorola, Inc., “Testing A/D Converters On Microcomputers”, 1985 International Test Conference, Paper 22.3, 1985 IEEE, pp. 818-824.
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Ahrens Christian
Campbell, Jr. Jules D.
Chen Jiang
Herrin Scott Willard
Jones, III Robert S.
Motorola Inc.
Wamsley Patrick
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