Method and circuit for semiconductor memory processing of video

Details Method and circuit for semiconductor memory processing of video Method and circuit for semiconductor memory processing of video

1989-02-10

1991-03-26

Smith, Jerry

Excavating

358336, 360 381, G06F 1110

Patent

active

050035410

ABSTRACT:
The active portion of every television line of a digital video signal is used to generate checked data according to a Reed-Solomon block code, line-sequentially with the data of the digital video signal. The Reed-Solomon check data are then added in the horizontal blanking intervals of the digital video signal for error detection and correction processing, so that there is no necessity to provide additional memory circuits in parallel to the memory used to store temporarily the video data of the active portion of television lines. The semiconductor memory distributes the digital video signal data of the active portion of each line by cyclically allocating the data words thereof to n data word planes to form a data block. A Reed-Solomon coder is provided for each plane of the memory and likewise a Reed-Solomon decoder for the read-out of each plane, the check data for each plane being stored in their respective planes during the blanking interval following the active line. The digital video signal data and check data are read-out line sequentially from the semiconductor memory. Error location and error correction is carried out in each memory plane. Error concealment is provided for uncorrectable but located errors.

REFERENCES:
patent: 4426698 (1984-01-01), Pargee
patent: 4464753 (1984-08-01), Chen
patent: 4660200 (1987-04-01), Okamoto
patent: 4694456 (1987-09-01), Morita
patent: 4775978 (1988-10-01), Hartness
patent: 4775979 (1988-10-01), Oka
patent: 4866719 (1989-09-01), Morgan
patent: 4882732 (1989-11-01), Kaminaga

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