Method and circuit for reducing VCO noise

Details Method and circuit for reducing VCO noise Method and circuit for reducing VCO noise

2006-09-19

2006-09-19

Shingleton, Michael B. (Department: 2817)

Oscillators

Ring oscillators

C331S17700V, C331S183000, C331S00100A, C331S017000

Reexamination Certificate

active

07109809

ABSTRACT:
A calibrated VCO for use in a phase-locked loop includes a low frequency calibration block for setting a bias signal for a ring oscillator to a center point to prompt the ring oscillator to generate an oscillation that is in the middle of its output frequency range and a high frequency VCO gm stage for generating an adjustment calibration signal that is added or subtracted to and from the bias signal created by the low frequency calibration block. A low pass filter coupled between the gates of a current mirror of the low frequency calibration block operates to filter noise and interference generated within the low frequency calibration block. Additionally, the magnitude of the bias signal produced by the low frequency calibration block is significantly greater than the adjustment bias signal generated by the high frequency VCO gm stage.

REFERENCES:
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patent: 6597614 (2003-07-01), Nam et al.
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U.S. Appl. No. 10/660,062, filed Sep. 11, 2003, Groen et al.
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Kamran Iravani et al.; “Clock and Data Recovery for 1,25Gb/s Ethernet Transceiver in 0.35um CMOS”; IEEE 1998 Custom Integrated Circuits Conference; pp. 261-264.
John G. Maneatis; “Low-Jitter Process-Independent DLL and PLL Based on Self-Biased Techniques”; 1996 IEEE; pp. 1723-1732.

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