Method and circuit for reducing power and/or current consumption

Details Method and circuit for reducing power and/or current consumption Method and circuit for reducing power and/or current consumption

1996-12-17

1999-09-07

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327157, 327 42, 327142, 331DIG2, H03L 706

Patent

active

059492619

ABSTRACT:
A semiconductor device (e.g., a zero-delay buffer) is provided which is capable of reducing current or power consumption without the use of a dedicated pin. The device may include a frequency detector that receives a detector input signal corresponding to or derived from a device input signal. The device input signal performs a first function during normal operation of the device. The detector determines whether the frequency of the detector input signal is less than a predetermined minimum, and if so, generates a power down signal configured to direct the device to reduce current or power consumption in at least one of its component circuits. The frequency detector may include a "one-shot" circuit responsive to the detector input signal for generating a frequency indicator signal, and a "power down" signal output circuit responsive to the frequency indicator signal for generating the power down signal.

REFERENCES:
patent: 4787097 (1988-11-01), Rizzo
patent: 5079666 (1992-01-01), Najm
patent: 5202906 (1993-04-01), Saito et al.
patent: 5260979 (1993-11-01), Parker et al.
patent: 5369311 (1994-11-01), Wang et al.
patent: 5388265 (1995-02-01), Volk
patent: 5410572 (1995-04-01), Yoshida
patent: 5434819 (1995-07-01), Matsuo et al.
patent: 5502689 (1996-03-01), Peterson et al.
patent: 5552727 (1996-09-01), Nakao
patent: 5572167 (1996-11-01), Alder et al.
patent: 5577086 (1996-11-01), Fujimoto et al.
patent: 5680286 (1997-10-01), Pacholok
patent: 5699020 (1997-12-01), Jefferson
patent: 5828253 (1998-10-01), Murayama
Cypress Semiconductor Corp., Cypress Data Book CD-ROM Summer 1996, CY2291/CY2292, pp. 1-7, Jun. 1994-Revised Sep. 1995.
Cypress Semiconductor Corp., Cypress Data Book CD-ROM, Summer 1996 CY7C42X/46X FIFO Interface to the CY7B923 (HOTLink.TM.), pp. 6-326 to 6-328.
Cypress Semiconductor Corp., Cypress Data Book CD-ROM Summer 1996, CY27H512, pp. 1-11, Jun. 1994--Revised Oct. 1995.
"An 80-ns 1-Mb Flash Memory with On-Chip Erase/Erase-Verify Controller," Seki et al., IEEE Journal of Solid-State Circuits, vol. 25, No. 5, pp. 1147-1151, Oct. 1990.
Cypress Semiconductor Corp., Cypress Data Book CD-ROM Summer 1996, CY7B923/CY7B933, pp. 1-28, Dec. 1991-Revised Aug. 1994.
Cypress Semiconductor Corp., Cypress Data Book CD-ROM Summer 1996, CY7B991/CY7B992, pp. 1-13.
Cypress Semiconductor Corp., Cypress Data Book CD-ROM Summer 1996, CY7B9910/CY7B9920, pp. 1-7, Nov. 1994--Revised Feb. 1996.
Cypress Semiconductor Corp., ICD2093, pp. 1-2, Mar. 1995.

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