Method and circuit for providing interface signals between...

Telecommunications – Transmitter

Reexamination Certificate

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Details

C455S093000, C341S126000, C341S135000, C341S144000

Reexamination Certificate

active

06615027

ABSTRACT:

BACKGROUND OF THE INVENTION
I. Field of the Invention
The present invention relates to electronics circuits. More particularly, the present invention relates to novel and improved method and circuit for providing interface signals between integrated circuits.
II. Description of the Related Art
Many electronics systems are implemented using multiple integrated circuits (ICs) that interface together to provide the required system functionality. In many instances, circuit interfaces are provided by digital signals having two logic levels (e.g., high and low) to express digital values. Digital signals are popular for interface because of their ease of implementation and robust immunity to noise.
Special challenges arise when interfacing a digital IC with an analog IC. Digital ICs are more efficient and cost effective for implementing digital functions such as digital signal processing and the like. Analog ICs are used to provide linear functions such as signal amplification, buffering, filtering, modulation, mixing, and so on. In many designs, the interface between the digital and analog ICs is implemented using digital signals. Within the analog IC, the digital signals are buffered, converted to analog signal(s) if necessary, and provided to the analog circuit(s).
The use of digital signals to interface digital and analog ICs is undesirable in some applications for several reasons. First, digital signals typically have large signal swing and sharp transition edges, thereby generating large switching noise. This noise can degrade the performance of the analog circuits, which typically operate on smaller signal swing. The amount of noise can be reduced, to an extent, by using separate power supplies and circuit grounds for analog and digital circuits within the analog IC. However, the reduction may not be adequate for some applications. Second, because each digital signal typically provides one bit of data, multiple (e.g., eight) digital signals are necessary to concurrently provide multiple (e.g., eight) bits of data. In addition, one or more clock signals [may also be] are typically provided to latch the data bits at the receiving IC. A large number of signal lines, and a corresponding number of device pins, may thus be required to interface the ICs. Moreover, switching noise typically increases with more digital signal lines.
Accordingly, techniques for providing an improved interface between ICs using fewer signal lines that generate a reduced amount of noise are highly desirable. It is also desirable that the interface does not require complex circuitry to implement.
SUMMARY OF THE INVENTION
The present invention provides techniques to interface a digital IC and an analog IC. In accordance with one aspect of the invention, one or more interface circuits implemented on the digital IC receive data inputs and, in response, provide interface signals that are provided to the analog IC. For some interfaces (e.g., baseband signals), differential current signals having multiple bits of resolution are used. These signals require fewer signal lines to implement and generate a reduced amount of noise, as compared to digital signals. A reference signal can be provided for use in generating the interface signals.
An embodiment of the invention provides circuitry to generate an interface signal between a first and a second integrated circuit. The circuitry includes a reference circuit, an interface circuit, and a circuit element. The reference circuit provides a reference signal. The interface circuit is implemented on the first integrated circuit, operatively couples to the reference circuit, receives the reference signal and a data input, and generates the interface signal. The circuit element is implemented on the second integrated circuit, operatively couples to the control circuit, receives the interface signal, and provides an output signal.
In an embodiment, the interface circuit includes a current mirror coupled to a switch array. The current mirror receives the reference signal and includes two or more mirror paths. The switch array receives and decodes the data input and directs current from a selected set of mirror paths to an output of the switch array.
The reference signal can be a voltage signal or a current signal (i.e., generated based on a voltage reference), and can be generated with a reference circuit implemented on the first or (preferably for some applications) the second integrated circuit. In an embodiment, the interface signal is a differential current signal having multiple (e.g., four, eight, or more) bits of resolution and filtered with a RC network. The interface circuit may be oversampled to ease the filtering requirement. In an exemplary embodiment, the interface signal represents an inphase (I) or a quadrature (Q) baseband signal in a quadrature transmitter, or a control signal. The circuit element can be, for example, a VGA, a modulator, or other circuits.
Another embodiment of the invention provides circuitry in a transmitter that include a first interface circuit (and for some embodiments, a second interface circuit) operatively coupled to a modulator. The first (and second) interface circuit is implemented on a first integrated circuit, receives a first (or second) data input, and provides a first (or second) differential current signal. The modulator is implemented on a second integrated circuit, receives the first (and second) differential current signal and a carrier signal, and generates an output signal in response. Each data input represents a digital baseband signal and can have four, eight, or more bits of resolution. A reference circuit may be implemented on the second (or possibly first) integrated circuit to provide a reference signal. The interface circuits generate the differential current signals based, in part, on the reference signal.
Yet another.embodiment of the invention provides a transmitter in a (e.g., CDMA) cellular telephone that includes a digital processor, first and second interface circuits, and a modulator. The digital processor is implemented on a first integrated circuit and provides the digital inphase (I) and quadrature (Q) baseband signals. The first and second interface circuits are implemented on the first integrated circuit and couple to the digital processor. Each interface circuit receives a respective digital baseband signal and provides an analog baseband signal. Each analog baseband signal has at least four bits of resolution and is implemented as a differential current signal. The modulator is implemented on a second integrated circuit, operatively couples to the first and second interface circuits, and receives and modulates the analog baseband signals with a carrier signal to provide a modulated output signal. The transmitter can also include a reference circuit that provides a reference signal. The interface circuits then receive the reference signal and generate the analog baseband signals based, in part, on the reference signal.
Yet another embodiment of the invention provides a method for providing an interface signal from a first to a second integrated circuit. In accordance with the method, a reference signal is generated at either the first or second integrated circuit and provided to the first integrated circuit. A data input is also received in the first integrated circuit and is used in conjunction with the reference signal to generate the interface signal. The interface signal is then provided from the first to the second integrated circuit. A circuit element in the second integrated circuit receives the interface signal and generates an output signal in response. The circuit element can also receive a signal related to the reference signal, and can generate the output signal based, in part, on this received signal.


REFERENCES:
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patent: 4894864 (1990-01-01), Cook
patent: 5030924 (1991-07-01), Fritz
patent: 5200655 (1993-04-01), Feldt
patent: 5274702 (1993-12-01), Rosch et al.
patent: 5371500 (1994-12-01), Lippmann et al.
patent: 5880631 (1999-

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