Method and circuit for programming a memory cell, in...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185180, C365S189090

Reexamination Certificate

active

07656712

ABSTRACT:
A method programs a memory cell comprising: an initial phase in which a continuous voltage is applied to a drain terminal of said memory cell and a suitable programming voltage signal is applied to a gate terminal thereof; a regulation phase in which a constant voltage value is applied to said gate terminal and a voltage value of said drain terminal is regulated so as to be maintained at a fixed value until a threshold voltage value of said memory cell is set at a desired threshold voltage level; and a disable phase that stops said programming and is triggered as soon as a programming current value of said memory cell goes below a reference current value, said reference current value corresponding to the attainment by the threshold voltage value of said memory cell of the desired threshold voltage value. A programming circuit is suitable for implementing this method.

REFERENCES:
patent: 5596532 (1997-01-01), Cernea et al.
patent: 5835420 (1998-11-01), Lee et al.
patent: 5982677 (1999-11-01), Fontana et al.

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