Method and circuit for preventing forward bias of a parasitic di

Details Method and circuit for preventing forward bias of a parasitic di Method and circuit for preventing forward bias of a parasitic di

1996-05-24

1997-10-07

Cunningham, Terry

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

327312, 327313, 327382, 327383, 327545, G05F 110

Patent

active

056752814

ABSTRACT:
A method and circuit for preventing forward bias of a collector-substrate diode in an integrated circuit with a bipolar transistor where a load driven by the transistor may be offset from a reference voltage, such as circuit ground, by a varying voltage offset. The difference between the bipolar transistor collector voltage and the reference voltage is sensed, and the bipolar transistor base current is varied responsive to the sensed difference so that the base current is zero when the collector voltage is equal to the reference voltage, whereby the collector current will be less than .beta. times the base current when the emitter voltage is less than the reference voltage and the diode will not become forward biased.

REFERENCES:
patent: 4380740 (1983-04-01), Kaplan
patent: 4733196 (1988-03-01), Menniti et al.
patent: 5028881 (1991-07-01), Spence
patent: 5119015 (1992-06-01), Watanabe
patent: 5381106 (1995-01-01), Limberg
patent: 5412309 (1995-05-01), Ueunten
patent: 5424665 (1995-06-01), Sueri et al.
patent: 5434533 (1995-07-01), Furutani
Acquanita, IBM Technical Disclosure Bulletin--"Short-Circuit Protection For Driver Transistor", Jan. 1984, pp. 4146-4147.

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