Method and circuit for perturbing removable singularities in...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific input to output function – Exponential

Reexamination Certificate

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C327S362000

Reexamination Certificate

active

07352231

ABSTRACT:
A translinear network (34) has first (Q1, Q2, Q3, Q4) and second (Q4, Q3, Q5, Q6) translinear loops. A Trafton-Hastings clamp circuit (36) is connected to generate a piecewise-polynomial-continuous current IY, the value of which becomes undefined when current IX=0 due to a removable singularity in the transfer equation at this point. A current mirror (38) comprising a plurality of transistors (M1, M2, M3) is coupled to the Trafton-Hastings clamp circuit (36), and operates to add additional currents in transistors Q3and Q5to IX, when the Trafton-Hastings clamp transistor (Q7) conducts, so as to perturb the removable singularity in the transfer equation into the left half-plane.

REFERENCES:
patent: 4323797 (1982-04-01), Embree et al.
patent: 5134355 (1992-07-01), Hastings et al.
patent: 6074082 (2000-06-01), Gilbert
patent: 6842050 (2005-01-01), Hastings et al.
patent: 6999292 (2006-02-01), Clara et al.
patent: 2002/0018526 (2002-02-01), Osaka et al.
Hastings, The ART of Analog Layout, Prentice Hall, 2001, pp. 318-322.
Gilbert, “Current-mode Circuits From A Translinear Viewpoint: A Tutorial”, in Lidgey et al., Analogue IC design: the current-mode approach, 1999, p. 19.
Hastings, Integrated MOSFET Interface for a Synchronously-Rectified SMPS, Proc. of the 1995 Bipolar/BiCMOS Circuits and Technology Meeting, 1995, pp. 58-61.
Hastings A. “Integrated MOSFET interface for a synchronously-rectified SMPS” Bipolar/BICMOS Circuits and Technology Metting, 1995. Proceedings of the 1995 Minneapolis, MN, USA Oct. 2-3, 1995, New York, NY, USA, IEEE, US, Oct. 2, 1995, pp. 58-61, XP010159317 ISBN: 0-7803-2778-0 p. 60, right-hand column, line 16-p. 61, left-hand column, line 2; figure 5.

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