Method and circuit for performing running disparity measurements

Coded data generation or conversion – Digital code to digital code converters – To or from minimum d.c. level codes

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341 94, 375 19, H03M 500

Patent

active

052297691

ABSTRACT:
A running disparity circuit for 8B/10B decoding which reduces power consumption and substantially reduces the number of gates and the required silicon area by employing a combination of state type devices and combinatorial logic instead of combinatorial devices exclusively.

REFERENCES:
patent: 4547890 (1985-10-01), Gindi
patent: 4975916 (1990-12-01), Miracle et al.
patent: 5025256 (1991-06-01), Stevens
patent: 5144304 (1992-09-01), McMahon et al.

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