Method and circuit for noise shaping

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

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341161, H03M 300

Patent

active

054164834

ABSTRACT:
A noise shaping circuit permitting a wide dynamic range for input signal and having an improved S/N ratio. In FIG. 1, the circuit comprises a delay part 3 for delaying the output signal for a one-sampling period; a first subtraction part 1 for subtracting the delayed signal, via the delay part 3 from the input signal imparted to the input terminal so as to generate first subtraction results; a first integration part 2 for integrating the first subtraction results; a second subtraction part 4 for subtracting the input signal from the first integrated value of the part 2; a second integration part 5 for integrating the second subtraction value so as to obtain a second integrated value; an addition part 7 for adding the first and second integrated values so as to obtain an addition results, and a quantizer 6 for quantizing the addition results. The amplitude of the signal imparted to the part 5 is minimized by means of the part 4, so that the dynamic range of the part 5 is utilized with high efficiency.

REFERENCES:
patent: 4862169 (1989-08-01), Van Bavel et al.
patent: 5153593 (1992-10-01), Walden et al.
(J-SC/22/6//17214) A 16-Bit Oversampling A-to-D Conversion Technology Using Triple-Integration Noise Shaping, Matsuya et al., IEEE Journal of Solid State Circuits, SC-22(6):921-929 (1987).
A Multi-Stage Noise Shaping 16 Bit CMOS A to D Conversion LSI, Matsuya et al. ICD87-52:7-12 (1987).
The Design of Sigma.gtoreq.Delta Modulation Analog-to-Digital Converters, Boser et al., Reprinted from IEEE J. Solid-State Circuits, SC-23:1298-1308.
Improved Double Integration Delta-Sigma Modulations For A to D to A Conversion, Shoji et al., Reprinted from IEEE Proc. ISCAS 87:451-454 (1987).

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