Method and circuit for measuring on-chip, cycle-to-cycle...

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – Frequency of cyclic current or voltage

Reexamination Certificate

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C324S076520

Reexamination Certificate

active

06841985

ABSTRACT:
The invention provides a method and circuit for measuring on-chip, cycle-to-cycle, jitter. Copies of a circuit comprising a programmable delay line, a programmable phase comparator, and two counters are placed at different locations on an IC near a clock signal. The programmable delay line creates a clock signal that is delayed by one clock cycle. This delayed clock signal is compared in time to the original clock signal by the programmable phase comparator. If the difference in time between the delayed clock signal and the clock signal is greater than the dead time, the first counter is triggered. If the difference in time is negative and the absolute value is greater than the dead time, the second counter is triggered. A statistical distribution, based on the values of the counters, is created. This distribution is used to predict on-chip, cycle-to-cycle jitter.

REFERENCES:
patent: 6185510 (2001-02-01), Inoue
patent: 6542038 (2003-04-01), Nishimura et al.
patent: 6640193 (2003-10-01), Kuyel
patent: 6661266 (2003-12-01), Variyam et al.
patent: 6754613 (2004-06-01), Tabatabaei et al.
patent: 20040061488 (2004-04-01), Rosenbaum et al.

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