Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2003-04-21
2004-07-20
Young, Brian (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C341S144000
Reexamination Certificate
active
06765520
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to improvements in delta-sigma modulator analog-to-digital converters, and particularly, to improvements in delta-sigma analog-to-digital converters which are useful not only for measuring AC input voltages but are especially suitable for measuring DC voltages.
Various techniques of providing analog-to-digital conversion of signals are well known. One well-known oversampling analog-to-digital (A/D) conversion technique uses a delta-sigma modulator including one or more integrators, a comparator, and a digital-to-analog converter (DAC) in the feedback path. A low-pass decimation filter is used allowing the modulator to provide necessary filtering. Typically, it is desirable in the design of a delta-sigma modulator to reduce quantization noise, which may be achieved by providing a transfer function for the overall modulator that possesses high in-band gain and high out-of-band attenuation, thereby shaping the quantization noise spectrum advantageously. This is usually accomplished by use of higher order delta signal modulators, which include multiple integration stages. Higher order modulators become unstable and therefore oscillate for inputs that exceed certain bounds. Instability may also occur as a result of the modulator being powered up since, since powering up of operational amplifier integrators with arbitrary initial states may place the modulator in an unstable region of its state space. Therefore, higher order delta sigma modulators require circuitry for detecting instability and restoring or resetting the modulator loop back to a stable state.
One approach to correcting the instability found in higher order modulators (three or more integration stages) is to use state-variable clamping techniques.
FIG. 2
shows an integration stage
18
of a modulator including an operational amplifier
20
having an integration capacitor
22
and a limiter
24
coupled between the non-inverting input and the output of the operational amplifier
20
. A non-linear element, such as a limiter, coupled across the integrating capacitor
22
prevents large values from appearing at the integrator output. Typically, for a higher order modulator circuit, the non-linear elements are set to turn “ON” at voltage levels of about 20-50% higher than the peak-to-peak integrator voltage swings. Examples of limiting schemes implemented in an integrator stage are shown in U.S. Pat. No. 5,977,895 by Murota et al., issued Nov. 2, 1999, entitled “WAVEFORM SHAPING CIRCUIT FOR FUNCTION CIRCUIT AND HIGH ORDER DELTA SIGMA MODULATOR”, Pat. No. 6,064,326 by Krone et al., issued May 16, 2000, entitled “ANALOG-TO-DIGITAL CONVERSION OVERLOAD DETECTION AND SUPPRESSION”, and U.S. Pat. No. 5,012,244 by Wellard et al., issued Apr. 30, 1991, entitled “DELTA-SIGMA MODULATOR WITH OSCILLATION DETECT AND RESET CIRCUIT” disclose known ways of detecting instability of a delta sigma modulator and restoring it to a stable state.
However, the closest prior art to the present invention is believed to be commonly assigned U.S. Pat. No. 6,362,763 by Wang, entitled METHOD AND APPARATUS FOR OSCILLATION RECOVERY IN A DELTA-SIGMA A/D CONVERTER, issued Mar. 26, 2002.
FIGS. 1 and 2
labeled “prior art” herein, herein indicate the circuit structure of the integrators included in the delta sigma modulator of the '763 patent. The delta sigma ADC disclosed in this patent is primarily useful for processing audio input signals. However, it is not well suited for converting DC input signals to digital values because if the modulator becomes unstable as a result of a positive over-range input signal, the positive full scale digital output of a digital filter (that receives and filters the output of the delta sigma modulator) is reset to a negative full scale digital value when the circuit that detects the instability resets the modulator to a stable state. This is unacceptable because in many applications in which an ADC is used to measure and convert a DC input voltage to a digital output, it is highly desirable that a positive full scale output (i.e., all “1”s), not a negative full scale output (i.e., not all “0”s), be produced at the digital filter output. This is not the case in typical audio applications, because in audio applications it usually is acceptable for the digital filter output to be reset to all “0”s whenever the modulator and the digital filter are reset as a result of the positive range of the modulator input being exceeded.
Another problem with the delta sigma modulator shown in U.S. Pat. No. 6,362,763 is that its circuit topology results in possible unbalanced parasitic capacitances which produce errors due to the additional switch
70
that is coupled between the input nodes of the differential amplifier
64
. These parasitic-capacitance-errors are amplified by amplifier
64
and can substantially reduce the accuracy of the delta sigma modulator. Also, in some implementations, the switch
70
must be located a long distance on the semiconductor chip from the switch
72
, which may necessitate use of different reset signals to control the two switches to ensure that they are simultaneously turned on and off to avoid errors at the sensitive (+) and (−) inputs of the amplifier
64
.
Thus, there is an unmet need for an improved inexpensive delta sigma ADC of order greater than 1 that is especially suited to measuring/converting DC input voltages to digital values.
There also is an unmet need for an improved inexpensive delta sigma ADC of order greater than 1 which does not reset a digital filter thereof to “0”s (i.e., to a negative fall scale value) whenever a positive input signal causes the delta sigma modulator to become unstable.
There also is an unmet need for a more accurate delta sigma modulator in a delta sigma ADC of order greater than 1 which does not reset a digital filter thereof to “0”s every time a positive input signal causes the delta sigma modulator to become unstable.
There also is an unmet need to avoid inaccuracy caused by unbalanced parasitic devices in the integrators of a delta sigma ADC of order greater than 1 which does not reset a digital filter thereof to “0”s whenever a positive input signal causes the delta sigma modulator to become unstable, wherein unbalanced parasitics are avoided in the integrating stages.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an improved inexpensive delta sigma ADC of order greater than 1 that is especially suited to measuring/converting DC input voltages to digital values.
It is another object of the present invention to provide an improved, inexpensive delta sigma ADC of order greater than 1 which does not reset a digital filter thereof to “0”s whenever a positive input signal causes the delta sigma modulator to become unstable.
It is another object of the present invention to provide a more accurate delta sigma modulator in a delta sigma ADC of order greater than 1 which does not reset a digital filter thereof to “0”s whenever a positive input signal causes the delta sigma modulator to become unstable.
It is another object of the present invention to provide a more accurate delta sigma modulator in a delta sigma ADC of order greater than 1 which produces a steady, reliable (+) full scale output whenever there is a (+) out-of-range analog input sufficient to cause the delta sigma modulator to become unstable.
It is another object of the present invention to provide an improved delta sigma ADC of order greater than 1 which does not reset a digital filter thereof to “0”s whenever a positive input signal causes the delta sigma modulator to become unstable, wherein unbalanced parasitics are avoided in the integrating stages.
Briefly described, and in accordance with one embodiment, the present invention provides an analog-to-digital converter including a delta sigma modulator which includes an input conductor (
86
), and a summing device (
102
) having a first input coupled to the input conductor, a quantizer (
98
) for producing a modulator out
Chuang Shang-Yuan
Todsen James L.
Brady W. James
Lauture Joseph
Swayze, Jr. W. Daniel
Young Brian
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