Method and circuit for input offset correction in an...

Amplifiers – With periodic switching input-output

Reexamination Certificate

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C330S069000, C330S12400D

Reexamination Certificate

active

11097856

ABSTRACT:
A method and circuit for eliminating input voltage offset in an amplifier circuit are provided. An exemplary offset correction circuit is configured with DC restoration to eliminate the DC input voltage offset by suitably providing a correction voltage to correct an input voltage offset during operation of the amplifier circuit, without realizing recovery time problems associated with AC coupling. An exemplary offset correction circuit is configured with DC restoration and comprises a timing circuit, a sample and hold circuit, and a feedback circuit to provide a correction voltage signal to correct input voltage offset. The timing circuit is configured to determine a “dead time” and “live time” for operation of the amplifier circuit. During the “dead time” period the sample and hold circuit will sample a differential signal across the DC coupling and provide a feedback signal through feedback circuit to correct input offset voltage. During the “live time” operation of the amplifier circuit, the sample and hold circuit operates to hold the level of correction voltage provided by the feedback circuit to suitably maintain a low input voltage offset.

REFERENCES:
patent: 4047122 (1977-09-01), Rao
patent: 5515001 (1996-05-01), Vranish
patent: 5841318 (1998-11-01), Cram
patent: 5880618 (1999-03-01), Koen
patent: 6229375 (2001-05-01), Koen
Toumazou, C. et al., Extending voltage-mode op amps to current-mode performance, IEE Proceedings, vol. 137, Pt. G, No. 2, Apr. 1990, pp. 116-130.

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