Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2001-10-24
2003-09-16
Jeanglaude, Jean Bruner (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C341S144000, C341S155000
Reexamination Certificate
active
06621435
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to sigma-delta modulators and, more particularly, to a method of improving the signal
oise ratio of a sigma-delta modulator during the re-establishment of its stability, and to a circuit that uses the method.
2. Description of the Related Art
As is known, sigma-delta modulation is a technique which enables a high-resolution analogue-digital conversion to be achieved. According to this technique, an analogue signal is “over-sampled,” that is, it is sampled at a rate much faster than is necessary for a conventional analogue-digital converter operating at the Nyquist rate. A sigma-delta modulator integrates the analogue signal and performs a conventional delta modulation on the integral of the signal. For this purpose, the modulator uses a low-resolution quantizer. The output signal of the quantizer is added, with its sign reversed, to the analogue input signal, by a feedback loop containing a digital-analogue converter.
To produce a digital signal corresponding to the analogue input signal, the signal output by the modulator is subjected to the action of a so-called digital decimation filter which produces a digital output signal with a sampling rate equal to twice the Nyquist rate. By virtue of the over-sampling and of the digital decimation, this technique achieves a better resolution and less distortion than can be achieved with the technique of conversion at the Nyquist rate. Moreover, since the error signal, that is, the difference between the input signal and the sampled signal, is integrated, the sigma-delta modulator acts as a low-pass filter for the signal and as a high-pass filter for the quantization noise. It thus attenuates the noise in the signal band particularly effectively.
The noise attenuation is appreciable even with a first-order sigma-delta modulator, that is, a sigma-delta modulator comprising a single integrator upstream of the quantizer; however, to achieve the high signal-noise ratios required of high-resolution analogue-digital converters, it is necessary to use higher-order modulators, that is, modulators comprising several integrators in cascade.
With a higher-order modulator, however, problems of stability arise. The system may in fact be stable or unstable in dependence on the type of input signal (in particular, it is unstable for signals which exceed the input volume range of the circuit), in dependence on the starting conditions upon switching-on, and in dependence on the presence of any fluctuations in the supply voltage.
As soon as there is a departure from ideal operating conditions and, more precisely, when the gain of an element of the feedback loop falls below a certain limit, the modulator becomes unstable and tends to oscillate. The quantizer is an element of the feedback loop. The gain of the feedback loop is subject to variations as the operating conditions vary. Conditions of instability arise when the voltages of the internal analogue nodes reach values above the maximum design swing. In order to re-establish conditions of stability, intervention from outside the circuit is required. Various methods of doing this have been proposed and differ from one another in the manner in which the instability is detected and in the action undertaken to re-establish stability.
A first method provides for the connection of limiter elements in parallel with the capacitors of the integrators. The selection of the thresholds of the limiters is critical; in fact, if the thresholds are close to the limits of the dynamic range of the operational amplifiers of the integrators, the signal may also be limited during normal operation with high input signal levels, causing distortion; if, however, the thresholds are too low, there is a low signal
oise ratio. This solution cannot therefore be used in applications in which linearity is essential and a high signal
oise ratio is required.
A second method provides for detection of the oscillation which occurs in conditions of instability by measuring the analogue voltages of the internal nodes of the circuit and comparing them with respective predetermined reference values. If the reference values are exceeded, the system is considered unstable and the state variables of the modulator are reset to zero. In this case also, unnecessary limitations may occur since, in normal operation, some internal nodes may often be overloaded temporarily without this necessarily causing a condition of instability.
It has also been proposed to allow the modulator to become unstable and to detect the instability by monitoring the digital output signal. More particularly, a sequence of bits which corresponds to an instability state is defined and the output flow of bits is kept under surveillance in order to identify the appearance of such a sequence and consequently to indicate an instability state. As soon as the instability is detected, the output voltages of all of the integrators, or at least of some of them, are reset to zero so that, if the cause of the instability has ceased, the modulator is returned to stable operating conditions.
This technique has the advantage of avoiding unnecessary limitations during normal operation since the resetting operation is enabled only when an instability state has occurred. However, the time required to detect the instability is not always negligible so that, before the modulator is reset and returned to normal operating conditions, a residual output signal is present which degrades the signal
oise ratio in a manner which may be unacceptable in some applications. This phenomenon becomes very noticeable in the event of overloads which persist for long periods, causing repeated resetting operations.
BRIEF SUMMARY OF THE INVENTION
The disclosed embodiments of the present invention provide a method that ensures a sufficiently high signal
oise ratio of the sigma-delta modulator, even during detection and stability re-establishment operations. A circuit for implementing the method is also provided.
In accordance with a method of the present invention, the signal-to-noise ratio of a sigma-delta modulator is improved during the re-establishment of its stability by defining a bit sequence corresponding to a state of instability of the modulator; monitoring the flow of bits output by the modulator to check whether it contains the instability bit sequence; and resetting the modulator to zero if the instability bit sequence is detected at the output, including delaying the flow of bits output by the modulator at least for the time required to detect the instability bit sequence, and modifying the output bit sequence during the delay time by replacing it with a predetermined bit sequence.
In accordance with another embodiment of the invention, a circuit is provided that includes a sigma-delta modulator having an analog signal input which is also the output of the circuit, a digital signal output, and at least one zero-resetting input; and a control logic unit connected to the output of the modulator and to the zero-resetting input and comprising means for storing a sequence of output bits corresponding to a state of instability of the modulator, means for monitoring the flow of bits output by the modulator, and means for applying zero-setting signals to the zero-setting input of the modulator when the instability sequence is identified in the flow of bits output by the modulator, a shift register having a data input connected to the output of the modulator, a data output that is also the output of the circuit, and a setting input, the control logic unit including means for applying a setting signal to the setting input of the shift register when the instability sequence is identified in the flow of bits output by the modulator.
REFERENCES:
patent: 3971987 (1976-07-01), Carrubba et al.
patent: 5012244 (1991-04-01), Wellard et al.
patent: 5162799 (1992-11-01), Tanimoto
patent: 5248972 (1993-09-01), Karema et al.
patent: 5283578 (1994-02-01), Ribner et al.
patent: 5757301 (1998-05-01), Kuo et al.
patent:
Baschirotto Andrea
Cusinato Paolo
Jeanglaude Jean Bruner
Jorgenson Lisa K.
SEED IP LAw Group
STMicroelectronics S.r.l.
Tarleton E. Russell
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