Method and circuit for image rejection

Telecommunications – Receiver or analog modulated signal frequency converter – With wave collector

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Details

455302, 455314, H04B 110, H04B 126

Patent

active

061448451

ABSTRACT:
An image rejection circuit (10) receives an incoming signal (RF.sub.IN) and an oscillator signal (V.sub.OSC) generated by a local oscillator (26). Output signals (I.sub.OUT20 and I.sub.OUT40) are generated by first mixer circuits (14 and 34) by multiplying the incoming signal (RF.sub.IN) with the oscillator signal (V.sub.OSC) Second mixer circuits (24 and 44) multiply the output signals (I.sub.OUT20 and I.sub.OUT40) with a counter signal that is a divided oscillator signal (V.sub.OSC). A summing circuit (46) sums the signals generated by the second mixer circuits (24 and 44) and provides a signal (IF.sub.OUT). Phase shift circuits (22, 29, 31, and 42) provide a shifted oscillator signal (V.sub.OSC) and a shifted counter signal to the first and second mixer circuits (14, 24, 34, and 44) that cause cancellation of unwanted image signals in the signal (IF.sub.OUT).

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"Introduction to Communication Systems", Third Edition, by Ferrel G. Stremler, Copyright 1990, Example 5.3.1, pp. 254-255.

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