Method and circuit for generating an ATD signal to regulate the

Details Method and circuit for generating an ATD signal to regulate the Method and circuit for generating an ATD signal to regulate the

1998-11-04

2000-06-13

Nelms, David

Static information storage and retrieval

Addressing

Sync/clocking

36518907, 327 31, 327 36, G11C 800

Patent

active

060757507

ABSTRACT:
A method and a circuit generate a pulse synchronization signal (ATD) for timing the memory cell read phase in semiconductor integrated electronic memory devices. The pulse signal (ATD) is generated upon detection of a change in logic state of at least one of a plurality of address input terminals of the memory cells. The method consists of duplicating the ATD signal into at least one pair of signals and propagating such signals through separate parallel timing chains at the ends of which the ATD signal is reinstated, the chains being alternately active.

REFERENCES:
patent: 4800304 (1989-01-01), Takeuchi
patent: 5301165 (1994-04-01), Ciraula et al.
patent: 5404334 (1995-04-01), Pascucci et al.
patent: 5434824 (1995-07-01), Matsuzaki
patent: 5448529 (1995-09-01), Reddy et al.
patent: 5657269 (1997-08-01), Nanamiya
patent: 5757718 (1998-05-01), Suzuki
patent: 5886949 (1999-03-01), Villa et al.

Affiliated with

Also associated with

Rating

Method and circuit for generating an ATD signal to regulate the does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and circuit for generating an ATD signal to regulate the , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and circuit for generating an ATD signal to regulate the will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2074858