Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device
Reexamination Certificate
2001-12-06
2003-11-04
Clinger, James (Department: 2821)
Electric lamp and discharge devices: systems
Plural power supplies
Plural cathode and/or anode load device
C315S169100
Reexamination Certificate
active
06642663
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for driving a plasma display panel (PDP) used as a flat plasma display device such as a television, computer or a like, its driving circuit and a plasma display device having the driving circuit and more particularly to the method for an alternating current (AC) driving surface-discharge type plasma display, its driving circuit and the plasma display device provided with the driving circuit of such plasma display.
The present application claims priority of Japanese Patent Application No. 2000-372118 filed on Dec. 6,2000, which is hereby incorporated by reference.
2. Description of the Related Art
FIG. 14
is a schematic exploded perspective view showing configurations of a conventional AC driving surface-discharge type PDP
1
disclosed in, for examples Japanese Patent No. 3036496 or Japanese Laid-open Patent Application No. Hei 11-202831.
FIG. 15
is an enlarged cross-sectional view showing one display cell of the conventional PDP
1
. The display cell is a minimum unit making up a display screen. It should be noted that
FIG. 15
shows a view obtained by cutting the PDP
1
illustrated in
FIG. 14
in a longitudinal direction with its components being not resolved and obtained by viewing its right cross section.
In the PDP
1
shown in
FIGS. 14 and 15
, a plurality of stripe-shaped scanning electrodes
3
(
3
1
-
3
n
) (may hereinafter referred to as the scanning electrode
3
(
3
1
-
3
n
)) and stripe-shaped sustaining electrodes
4
1
-
4
n
may hereinafter referred to as the sustaining electrode
4
(
4
1
-
4
n
)) each being constructed of a transparent conductive thin film made of Indium Tin Oxide (ITO), tin oxide or a like, is formed at established intervals alternately on an under surface of a front insulating substrate
2
made of glass in a row direction (in a right to left direction in
FIG. 14
) and, in order to decrease a resistance value of the scanning electrode
3
(
3
1
-
3
n
) and sustaining electrode
4
(
4
1
-
4
n
) each having low conductivity, a plurality of trace electrodes
5
and
6
each being made up of a metal film such as a silver thick film or a like is formed on end side of an under surface of the scanning electrode
3
(
3
1
-
3
n
) and the sustaining electrode
4
(
4
1
-
4
n
) The under surface of the scanning electrode
3
(
3
1
-
3
n
) and the sustaining electrode
4
(
4
1
-
4
n
) and an under surface of the front insulating substrate
2
on which the scanning electrodes
3
and the sustaining electrode
4
(
4
1
-
4
n
) are not formed, is coated with a transparent dielectric layer
7
and an under surface of the dielectric layer
7
is coated with a protection layer
8
made from magnesium oxide which is used to protect the dielectric layer
7
from ion bombardment at a time of discharging.
On the other hand, a plurality of stripe-formed data electrodes
10
1
-
10
m
(may hereinafter referred to as the data electrode
10
(
10
1
-
10
m
)) made up of silver films or a like is formed on an upper surface of a rear insulating substrate
9
made from glass in a column direction (in a left to right direction in FIG.
14
), that is, in a direction orthogonal to a direction in which the scanning electrode
3
(
3
1
-
3
n
) and the sustaining electrode
4
(
4
1
-
4
n
) are formed and an upper surface of the data electrode
10
(
10
1
-
10
m
) and the upper surface of the rear insulating substrate
9
on which the data electrode
10
(
10
1
-
10
m
) are not formed is coated with a dielectric layer
11
. Moreover, stripe-shaped ribs (partitioning walls)
12
(hereinafter referred to as the rib
12
) used to partition the display cell are formed on an upper surface of the dielectric layer
11
except an upper portion of the data electrode
10
(
10
1
-
10
m
) and three kinds of fluorescent layers
13
R
,
13
G
, and
13
B
each converting ultra-violet rays produced by discharge of discharging gas into visible light having three primary colors including a red (R) color, green (G) color, and blue (B) color are formed on the upper surface of the di electric layer
11
existing in an upper portion of the data electrode
10
(
10
1
-
10
m
) and on sides of the rib
12
. The fluorescent layers 13
R
,
13
G
, and
13
B
are formed in order of the fluorescent layer
13
R
, fluorescent layer
13
G
and fluorescent layer
13
, in a row direction sequentially and repeatedly, and fluorescent layers
13
R
,
13
G
, and
13
B
used to convert ultra-violet rays into visible light having a same color are formed successively in a column direction. A discharging gas space
14
is secured which is formed by an under surface of the protection layer
8
, by an upper surface of each of the fluorescent layers
13
R
,
13
G
, and
13
B
, and by side walls of two ribs
12
being adjacent to each other. The discharging gas space
14
is filled with a discharging gas containing helium, neon or xenon or its mixed gas. A region made up of the scanning electrode
3
(
3
1
-
3
n
), the sustaining electrode
4
(
4
1
-
4
n
), the trace electrodes
5
and
6
, the data electrode
10
(
10
1
-
10
m
), the fluorescent layer
13
R
,
13
G
, and
13
B
, and the discharging gas space
14
serves as the display cell described above.
FIG. 16
is a schematic block diagram showing an example of configurations of a driving circuit of the conventional AC driving surface-discharge type PDP
1
of FIG.
14
. In the PDP
1
shown in
FIG. 16
, n pieces (“n” is a natural number) of the scanning electrodes
3
1
to
3
n
and n pieces (“n” is a natural number) of the sustaining electrodes
4
1
to
4
n
are formed at established intervals in a row direction and m pieces (“m” is a natural number) of the data electrodes
10
1
to
10
m
are formed at established intervals in a column direction and the number of the display cells on an entire display screen is (n×m) pieces.
The driving circuit of the PDP
1
, as shown in
FIG. 16
, chiefly includes a driving power source
21
, a controller
22
, a scanning driver
23
, a scanning pulse driver
24
, a sustaining driver
25
, and a data driver
26
. The driving power source
21
produces a logic voltage V
dd
of 5 Volts and, at a same time, a data voltage V
d
of about 70 Volts, and a sustaining voltage V
s
of about 180 Volts and also generates, based on the sustaining voltage V
s
, a priming voltage V
P
of about 400 Volts, a scanning base voltage V
bW
of about 100 Volts and a bias voltage V
sw
of about 195 Volts, and feeds the logic voltage V
dd
to the controller
22
, the data voltage V
d
to the data driver
26
, the sustaining voltage V
s
to the scanning driver
23
and the sustaining driver
25
, the priming voltage V
P
and scanning base voltage V
bw
to the scanning driver
23
and the bias voltage V
sw
to the sustaining driver
25
.
The controller
22
produces, based on a video signal S
v
fed from an outside, scanning driver control signals S
SCD1
to S
SCD6
, scanning pulse driver control signals S
SPD11
to S
SPDin
and S
SPD21
to S
SPD2n
, sustaining driver control signals S
SUD1
to S
SUD3
, data driver control signals S
DD11
to S
DD1m
and S
DD21
to S
DD2m
and then feeds the scanning driver control signals S
SCD1
to S
SCD6
to the scanning driver
23
, the scanning pulse driver control signals S
SPD11
to S
SPD1n
and S
SPD21
to S
SPD2
to the scanning pulse driver
24
, the sustaining driver control signals S
SUD1
, to S
SUD3
to the sustaining driver
25
, the data driver control signals S
DD11
to S
DD1m
and S
DD21
to S
DD2m
to the data driver
26
.
The scanning driver
23
, as shown in
FIG. 17
, includes switches
23
1
to
23
6
. One terminal of the switch
23
1
is supplied with the priming voltage V
p
and the other terminal of the switch
23
1
is connected to a positive line
27
. One terminal of the switch
23
2
is supplied with the sustaining voltage V
s
and the other terminal of the switch
23
2
is connected to the positive line
27
. One terminal of the switch
23
3
is connected to a negative line
28
a
Ishizuka Mitsuhiro
Okamura Teruo
Shirasawa Hiroshi
Shoji Takatoshi
Clinger James
NEC Corporation
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