Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement
Reexamination Certificate
2002-01-18
2003-12-02
Shingleton, Michael B (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including particular biasing arrangement
C330S285000, C330S298000
Reexamination Certificate
active
06657499
ABSTRACT:
BACKGROUND OF THE INVENTION
Power amplifiers are widely used in communication systems. Radio Frequency (RF) amplifiers, in particular, are widely used in wireless communication systems. For example,
FIG. 1
shows a Field Effect Transistor (FET) based power amplifier. The amplifier includes FET
100
with gate
102
, drain
104
, and source
106
. Gate
102
is DC biased with bias voltage V
bias
. Drain
104
is connected to voltage V
DD
through resistor
180
. Source
106
is connected to a common ground. RF input is coupled to gate
102
through capacitor
110
. RF output is coupled to drain
104
through capacitor
190
. The current flowing into drain
104
is active drain current I
DA
. When little or no RF input is coupled to gate
102
, the current I
DD
flowing into drain
104
is quiescent drain current I
DQ
.
FIG. 2
shows drain current I
DD
as a function of gate voltage V
gg
. In general, drain current I
DD
increases with gate voltage V
gg
. When bias voltage V
bias
is applied to gate
102
with no RF input, drain current I
DD
is equal to quiescent current I
DQ
. I
DQ
changes with temperature and over time with aging.
SUMMARY OF THE INVENTION
In one aspect, the invention provides a bias controller. The bias controller includes a bias detector, a reference comparator, a memory component, and a reference voltage. The bias detector is operable to detect a bias current associated with a device controlled by the bias controller and produce a proportional sensed bias voltage. The reference comparator is operable to compare the bias voltage to a reference voltage and produce a first control signal operable to adjust a bias output of the bias controller. The memory component stores a plurality of reference voltage settings, one for each mode of operation of the device. The memory component includes a mode setting input and a reference voltage output signal. The reference voltage adjustment circuit adjusts the reference voltage applied to the reference comparator in accordance with the mode of the device as controlled by the reference voltage output signal.
In another aspect, the invention provides a bias controller including a memory component and a potentiometer. The memory component stores a plurality of bias voltage settings, one for each mode of operation of the device. The memory component includes a mode setting input and a bias voltage output signal. The potentiometer has a control configured to receive the bias voltage output signal and adjusts a wiper position of the potentiometer to produce a control signal operable to adjust a bias of the bias controller.
In another aspect, the invention provides a bias controller and includes a bias detector, a reference comparator, a memory component, a reference voltage, a bias voltage and a controller. The bias detector is operable to detect a bias current associated with a device controlled by the bias controller and produces a proportional sensed bias voltage. The reference comparator is operable to compare the bias voltage to a reference voltage and produce a first control signal operable to adjust a bias output of the bias controller. The memory component stores a plurality of reference voltage settings and bias voltage settings, one of each for each mode of operation of the device. The reference voltage adjustment circuit adjusts the reference voltage applied to the reference comparator in accordance with the mode of the device as controlled by the reference voltage output signal. The bias voltage adjustment circuit adjusts the bias voltage applied to the device in accordance with the mode of the device. The controller has a mode selection input and is operable to receive a mode selection and identify and associate bias and reference voltage settings and provide an adjustment signal to one or more of the reference and bias voltage adjustment circuits.
Aspects of the invention can include one or more of the following advantages. The FET can be automatically biased and calibrated. The set up process during the manufacturing of power amplifiers can be simplified. The calibration process can be controlled though a digital interface to reduce design time and effort. The device can include an integrated temperature compensation circuit. Alarm functions can be integrated to improve system reliability and to provide advanced warning for power failure. Other advantages will be readily apparent from the attached figures and the description below.
REFERENCES:
patent: 5488331 (1996-01-01), Keane et al.
patent: 6417729 (2002-07-01), Lemay et al.
patent: 2002/0115395 (2002-10-01), Wojslaw
Fish & Richardson P.C.
Shingleton Michael B
Xicor Inc.
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