Method and circuit for controlling operation mode of PSRAM

Details Method and circuit for controlling operation mode of PSRAM Method and circuit for controlling operation mode of PSRAM

2005-12-20

2005-12-20

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S230080, C365S233500

Reexamination Certificate

active

06977865

ABSTRACT:
The present invention discloses a method and circuit for controlling an operation mode of a pseudo SRAM (PSRAM), a PSRM having the same, and a method for performing an operation mode thereof. When a clock is toggled and inputted in a synchronous mode in a chip-enabled state, a synchronous write and synchronous read operation is performed, and when the clock is not toggled, an asynchronous write operation is performed. Therefore, the asynchronous write and synchronous read operation and the synchronous write and synchronous read operation can be performed at the same time. Accordingly, an efficient interface is provided between the PSRAM and a NOR flash memory device.

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patent: 2004-5683 (2004-01-01), None

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