Amplifiers – With control of power supply or bias voltage – With control of input electrode or gain control electrode bias
Reexamination Certificate
2001-09-13
2002-11-12
Lam, Tuan T. (Department: 2816)
Amplifiers
With control of power supply or bias voltage
With control of input electrode or gain control electrode bias
C455S241100
Reexamination Certificate
active
06480063
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates to a baseband gain control and particularly to a baseband gain control method and circuit capable of effectively preventing problems derived from a DC offset in the gain control of a direct conversion baseband circuit or the like.
2. Description of the Prior Art
A receiver utilizing direct conversion is advantageous over conventional super-heterodyne type receiver in the following respects and, therefore, expected to be widely used in the future:
1) A high frequency circuit section is simplified and the number of parts such as a filter can be reduced.
2) Since most of the functions including band limitation and AGC (automatic gain control) are executed at a baseband frequency, they can be realized by a CMOS analog circuit suited for LSI.
FIG. 6
is a view showing the concrete constitution of a direct conversion receiver.
FIG. 6
shows a baseband gain control system for controlling the gain of a direct conversion baseband circuit, e.g., a system which has a wide dynamic range in the reception signals of a receiver of such a type as W-CDMA (Wide Band Code Division Multiple Access).
A high frequency signal received by an antenna
201
is subjected to band-limitation by a high frequency band-pass filter
202
and a received band is taken out. The signal thus band-limited is amplified by a low noise amplifier LNA
203
and directly inputted into a quadrature demodulator
204
. The quadrature demodulator
204
is driven by a local signal generated by a local oscillator
225
. The frequency of this local signal is the same as the central frequency of the received high frequency signal.
The quadrature demodulator
204
consists of multiplication circuits
222
and
223
and a phase circuit
224
. The balanced outputs of the low noise amplifier LNA
203
are multiplied by the multiplication circuits
222
and
223
through an amplifier
221
in response to the balanced outputs of an orthogonal signal having a phase of 0° and that of 90° of the local signal, respectively, a baseband signal is directly generated from the high frequency signal, and two types of signals, i.e., baseband signals I and Q, are outputted as demodulated outputs. These baseband signals I and Q are subjected to band-limitation by baseband filters
205
and
206
, respectively, and then amplified by an AGC circuit
207
so as to have a constant average amplitude.
The dynamic range of the AGC circuit
207
has characteristics of reaching several tens of decibels (about 80 dB for CDMA). The outputs of the AGC circuit
207
are outputted to the next stage as signals
215
and
216
, respectively. It is noted that a circuit controlling the gain of this circuit and the algorithm thereof are unrelated to the present invention and, therefore, not described herein.
According to the direct conversion system, channel filters for suppressing adjacent channels are realized not by SAW filters for an IF band but by the baseband filters
205
and
206
. Since they can be realized by circuits using active elements, the baseband filters
205
and
206
are suited for an IC. In addition, since the high frequency signal is directly converted into the baseband signals, there is no need to provide a second local oscillator. For these reasons, there is a probability that all the reception circuits from the low noise amplifier LNA
203
to the baseband outputs can be realized by one chip. This greatly contributes to making a cellular phone smaller in size and to the reduction of the number of parts.
Nevertheless, if there is a DC offset, even slightly, in the baseband filters
205
and
206
and the AGC circuit
207
, the gain of the AGC sometimes becomes as high as 80 dB and a saturation phenomenon occurs that outputs are fixed to a power supply or the ground. For example, if there exists a DC offset of 1 mV in the bandpass filter
205
and the gain of the AGC circuit
207
is 80 dB, i.e., 10,000 times as high as an input, a DC component of 10 V is outputted. Needless to say, such a voltage is far beyond the voltage of a battery for a cellular phone, with the result that the cellular phone cannot operate.
As stated above, it is the most significant problem with the baseband circuit of the direct conversion circuit to eliminate a DC offset as much as possible.
There have been conventionally used high-pass filters (C-cut) each consisting of a DC cut capacitor or the like and provided between stages of variable gain amplifiers so as to eliminate the DC offset of a baseband circuit.
FIG. 7
is a view showing that the baseband circuit for I or Q shown in
FIG. 6
is taken out. The baseband circuit consists of a plurality of gain control amplifiers having C-cut structures. To simplify description,
FIG. 7
shows the baseband circuit as a single-end circuit. A baseband filter
101
and variable gain amplifiers
102
,
103
and
104
(which amplifiers may be also referred to as “VGA
1
”, “VGA
2
” and “VGA
3
”, respectively) correspond to the baseband filter
205
(
206
) and the variable gain amplifiers
208
(
211
),
209
(
212
) and
210
(
213
), respectively.
According to this structure, for the purpose of preventing the propagation of a DC offset and the saturation of a signal due to the propagation thereof, high-pass filters
109
to
111
corresponding to C-cuts are inserted between the input section of the circuit and the VGA
102
, the VGA
102
and VGA
103
, the VGA
103
and the VGA
104
and the VGA
104
and the output section, respectively. The gains of the VGA
1
, VGA
2
and VGA
3
are controlled by gain control data distributed from the gain distribution circuit
112
based on gain data inputted from externally.
As stated above, by inserting the high-pass filters into the baseband circuit in appropriate units of the circuit, the propagation of a direct current is prevented in a static state in which gains have no change. In addition, the saturation of a signal due to the DC offset can be prevented.
However, according to the conventional method for eliminating a DC offset in the baseband circuit of the direct conversion receiver, a transient phenomenon due to the DC offset occurs in a dynamic control state in which gains have great change, which often has an adverse effect on reception characteristics.
Assuming that offset voltages V
of1
, V
of2
and V
of3
are added to the input sides of the VGA
1
, VGA
2
and VGA
3
, respectively, based on the circuit of
FIG. 7
, it is considered what type of a transient phenomenon occurs to an output if the respective gains g
1
, g
2
and g
3
are changed.
It is assumed here that the transfer functions of the high-pass filters
109
to
111
inserted as shown in
FIG. 7
are the same and represented by the following expression for brevity.
B
⁡
(
s
)
=
s
s
+
α
.
(
1
)
It is assumed that the gains of the VGA
1
, VGA
2
and VGA
3
(not as dB values but as true values) are g
1
, g
2
and g
3
, respectively, and that these gains are changed to g
1
′, g
2
′ and g
3
′, respectively. For brevity, the following conditions are set:
a) The gains g
1
, g
2
and g
3
are 1 time to 16 times as high as inputs;
b) The gains g
1
, g
2
and g
3
are not changed simultaneously; and
c) The gains g
1
, g
2
and g
3
are changed instantaneously.
1) If the gain of the VGA
3
is changed from g
3
to g
3
′:
Since being cut by the high-pass filters
109
and
110
, respectively, the offset voltages V
of1
and V
of2
have no effect on the output and only the offset voltage V
of3
has an effect on the output. At the input of the high-pass filter
111
, a step-like voltage change &Dgr;V
3
occurs as follows.
&Dgr;
V
3
=(
g
3
′−g
3
)·
v
of3
(2).
This step-like change influences an output V
out
through the high-pass filter
111
. A contribution thereof is described using Laplace transform as follows.
V
out
⁡
(
s
)
=
B
⁡
(
s
)
·
Δ
⁢
⁢
V
3
s
=
(
g
3
′
-
g
3
)
·
V
of3
·
1
s
+
α
.
(
3
)
Assuming tha
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