Method and circuit for computing the discrete cosine...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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C382S250000

Reexamination Certificate

active

06493737

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of electronics, and, more particularly, to signal processing of digital video image data.
BACKGROUND OF THE INVENTION
The encoding of video signals requires processing of a very high number of samples, e.g., millions per second. The sample flow is normally processed by many processors operating in parallel. In these applications, a two-dimensional Discrete Cosine Transform (DCT) is used on small input size signals to increase the calculation speed of the digital image compression process. The use of DCTs is disclosed, for example, in the article: “FAST ALGORITHMS FOR THE DISCRETE COSINE TRANSFORM”, by E. Feig and S. Winograd, IEEE Transactions on Signal Processing, Vol. 40, No. 9, September 1992.
The transformation phase is an important step of the digital image compression process since it allows compression of the information associated with the input signal. For instance, an 8×8 matrix image block is compressed into a relatively small number of coefficients. The calculation of the DCT is also used in the definition of the JPEG Standard for image compression. The calculation of the DCT involves a particularly large number of operations, typically on the order of O(N
2
). The variable N denotes the number of points to which the transform is applied. A number of fast calculating algorithms have been developed in an effort to lower the number of necessary operations.
A system for DCT calculation is disclosed in U.S. Pat. No. 5,197,021, titled “SYSTEM AND CIRCUIT FOR THE CALCULATION OF THE BIDIMENSIONAL DISCRETE TRANSFORM”. Another solution is disclosed by W. Pennebaker and J. Mitchell, in the article: “STILL IMAGE DATA COMPRESSION STANDARD,” Van Nostrand Reinhold, New York, 1993. However, when an implementation of such approaches is sought on systems in which the critical calculation depends on various factors, a substantial loss in algorithm efficiency is often incurred. This destroys any attempt in lowering the cost in terms of duty cycles required to complete the computation phase.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a technique for computing a bidimensional Discrete Cosine Transform (DCT) in a more efficient manner.
Another object of the invention is to provide a method for computing a DCT using a less complicated circuit, such as using a single microcontroller for computing the DCT.
Yet another object of the invention is to provide a circuit for reducing the computation time for computing a DCT.
The method and circuit according to the present invention computes a Discrete Cosine Transform in a more efficient manner for improving the computation speed, thereby reducing the computation time and allowing a higher number of digital samples to be processed.
The circuit provides a microcontroller that includes a parallel accumulation multiplier for performing at least a first transform of the input data. A further quantization step is then performed on the transformed data. Likewise, the method includes at least the first transform being computed by a parallel accumulation multiplier. IA further quantization step is performed on the transformed data. In this respect, the method and circuit provides good performance in terms of compression rate. The above cited features of the circuit are thus used to optimize the calculation times.


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Park et al., Area Efficient VLSI Architectures for Huffman Coding, IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, vol. 40, No. 9, Sep. 1993, pp. 568-575.
Schaumont et al., Synthesis of Pipelined DSP Accelarators With Dynamic Scheduling, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 5, No. 1, Mar. 1997, pp. 59-68.

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