Amplifiers – With periodic switching input-output
Reexamination Certificate
2000-10-03
2003-01-14
Mottola, Steven J. (Department: 2817)
Amplifiers
With periodic switching input-output
C327S307000
Reexamination Certificate
active
06507241
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to an electrical circuit, and more specifically, to an electrical circuit used to automatically correct offset voltages in high-gain differential amplifier chains and which is robust, inexpensive and requires no external measurement or correction programming.
2. Description of the Related Art
Communications receivers, like infrared (IR) wireless receivers or radiofrequency (RF) wireless receivers, often require high gain to amplify incoming signals to usable amplitudes. Such receivers typically use differential transceivers to suppress common-mode noise generated by other circuitry on the same integrated circuit (IC).
However, when the gain on the incoming signal is too high, device mismatch in the differential transceivers creates an offset voltage which is amplified along with the signal of interest. This offset voltage results in an error in determining the signal threshold at the analog-to-digital (A/D) converter and, if not corrected, will limit receiver sensitivity.
Transceivers may be produced without correcting offset voltage, in which case the transceivers will have to be examined after fabrication in a costly screening process to dispose of the modules which do not meet a required receiver sensitivity. However, it is more practical to design the transceiver so as to correct the offset voltage.
Correcting voltage offsets presents several concerns. For example, since voltage offsets typically vary with environmental factors (e.g., supply voltage and temperature), a separate screening program is required for each customer based on their application's environment. Further, the stresses induced on circuitry during packaging can cause piezoresistive changes in the components which can change the offset voltage. Therefore, such offsets cannot be corrected until after packaging.
There are several conventional methods used to correct voltage offsets. For instance, one traditional approach uses laser trimming of analog circuits. However, most modern digital complementary metal oxide semiconductor (CMOS) processes and analog BiCMOS processes cannot be laser trimmed because there are no laser trimmable resistors in the technology. In addition, laser trimming adds expense and is a one-time operation with no possibility of “dynamic” trimming of offsets for changes in environmental conditions.
Another method which is commonly used when a circuit is not laser trimmable (i.e., in the conventional sense of actually trimming a resistor on the die), uses laser fuses which can be blown to correct offsets. Unfortunately, this requires vastly greater die area and processing and, therefore, greater cost.
Another method corrects offsets by a feedback corrected offset cancellation circuit. However, continuous time feedback networks (which are all analog) introduce at least one more pole and zero in the amplifier circuit, and must be tested extensively to assure the offset cancellation does not produce oscillation of the circuit. Additionally, in some circuits, the frequency content of the data is so varied that it is not possible to use such a dynamic, analog, continuous-time feedback loop.
A common method of correcting offsets when signals are sampled at discrete time intervals is a switched capacitor offset cancellation technique. Here, during the sample and hold time, another clock phase is used to sample the offset and apply it to the amplifier input to correct it. Unfortunately, the charge on the capacitor which is used for offset correction slowly bleeds off due to inevitable leakage currents, and must be frequently refreshed. In addition, this technique does not work in applications having no continuous, well-controlled clock reference, or in applications such as communications links which cannot tolerate signal chopping.
More recently, off-chip component methods have been used to correct voltage offsets. For example, in the “DigiTrim” technique, an amplifier's offsets are canceled one time at wafer test level, then measured with an apparatus external to the circuit and corrected via external programming of the chip. Fuses are then blown to make the offset correction final.
Another off-chip component method is an electrically programmable analog-device (EPAD) technique which corrects offsets by a microprocessor which measures the offsets and applies suitable voltages to pins on the amplifier package.
Unfortunately, neither of these methods provides a self-contained, inexpensive offset correction which requires no external measurement and correction programming. Indeed, these techniques fail to address the need for offset correction in many analog applications which cannot be solved by feedback or chopper stabilization.
SUMMARY OF THE INVENTION
In view of the foregoing and other problems of the conventional systems and techniques, it is an object of the invention to provide a robust offset correction circuit which is inexpensive and requires no external measurement or correction programming.
In a first aspect, an offset correction circuit is provided which includes a detector element for detecting an offset voltage, a current switch, a current mirror for generating an offset correction voltage, and a logic element which inputs a signal from the detector element and outputs a signal to the current switch and current mirror. The logic element advances the counter of the circuit until the detector element changes state, at which point the offset voltage is corrected.
The logic element of the correction circuit may include a state machine for clocking the circuit, a control logic coupled to the state machine, and a counter coupled to the state machine and the control logic.
Further, the detector element of the correction circuit may include a comparator or an A/D converter. In addition, the offset correction current may be either internally generated by the current mirror or externally applied to the circuit.
In another aspect of the invention, a communications receiver is provided which has an amplifier chain coupled to an offset correction circuit as described above. The communications receiver may be an IR or RF wireless receiver, or any other communications circuit requiring high gain.
In another aspect of the invention, an operational amplifier is provided which has an amplifier chain coupled to an offest correction circuit as described above.
In a second embodiment of the invention, a method for correcting an offset voltage in an amplifier chain is provided which includes detecting the offset voltage, altering the offset voltage by using active devices connected to an input of the amplifier chain, and canceling the offset voltage by using a logic element to control the active devices until the offset voltage is substantially canceled.
These unique and unobvious features allow the claimed invention to correct offset voltages in high-gain differential amplifier chains in a manner which is robust, inexpensive and requires no external measurement or correction programming.
REFERENCES:
patent: 6061192 (2000-05-01), Ogiwara
International Business Machines - Corporation
McGinn & Gibb PLLC
Mottola Steven J.
Otterstedt, Esq. Paul
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