Method and circuit configuration for synchronous resetting...

Details Method and circuit configuration for synchronous resetting... Method and circuit configuration for synchronous resetting...

2007-02-27

2007-02-27

Nguyen, Linh My (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S144000

Reexamination Certificate

active

11027906

ABSTRACT:
A method and circuit configuration for synchronous resetting of an multiple clock domain circuit such as an Application Specific Integrated Circuit (ASIC) combine an asynchronous reset signal with a functional signal using a clocked reset tree of synchronous logic elements.

REFERENCES:
patent: 6606705 (2003-08-01), Volk
patent: 6696854 (2004-02-01), Momtaz et al.

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