Method and circuit configuration for controlling operating state

Details Method and circuit configuration for controlling operating state Method and circuit configuration for controlling operating state

1998-01-21

1999-11-30

Lam, Tuan T.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327154, H03K 300

Patent

active

059949317

ABSTRACT:
The ON and OFF states of a second device are controlled by a first device through a three-conductor bus. The bus carries data, clock, and enable signals and the second device is in the OFF state when all the signals of the three-conductor bus have an L level. The second device is in the ON state when at least one of the signals has an H level (higher potential than the L level). The enable signal is set to the H level during the data transmission. Otherwise, it carries an L level, while the data or clock signal has an H level. The system obviates an additional housing pin. The operating state information is transmitted relatively rapidly.

REFERENCES:
patent: 4501975 (1985-02-01), Josephs et al.
patent: 5227790 (1993-07-01), Shin et al.
patent: 5278581 (1994-01-01), Fukuyama et al.
PMB 2220, Siemens, Semiconductor Group, Aug. 1995, pp. 1-23.

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